TC58NVG0S3AFT05 데이터 시트보기 (PDF) - Toshiba

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TC58NVG0S3AFT05

TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS

Toshiba 

TC58NVG0S3AFT05

(12) Several programming cycles on the same page (Partial Page Program)

A page can be divided into up to 8 segments as follows:-

Data area (column address 0 to 2047): 512 bytes × 4 segments

1st segment: column address 0 to 511

2nd segment: column address 512 to 1023

3rd segment: column address 1024 to 1535

4th segment: column address 1536 to 2047

Redundant area (column address 2048 to 2111): 16 bytes × 4 segments

1st segment: column address 2048 to 2063

2nd segment: column address 2064 to 2079

3rd segment: column address 2080 to 2095

4th segment: column address 2096 to 2111

Each segment can be programmed individually as follows:

1st programming

Data Pattern 1

2nd programming

All 1 s

Data Pattern 2

All 1 s

All 1 s

8th programming

All 1 s

Data Pattern 8

Result

Data Pattern 1

Data Pattern 2

Data Pattern 8

Figure 24.

Note: The input data for unprogrammed or previously programmed page segments must be “1”

(i.e. the inputs for all page bytes outside the segment which is to be programmed should be set to all “1”).

2003-08-20A 29/33

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