TC58NVG0S3AFT05 데이터 시트보기 (PDF) - Toshiba

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TC58NVG0S3AFT05

TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS

Toshiba 

TC58NVG0S3AFT05

Reset

The Reset mode stops all operations. For example, in the case of a Program or Erase operation the internally

generated voltage is discharged to 0 volts and the device enters Wait state.

The response to an “FFh” Reset command input during the various device operations is as follows:

When a Reset (FFh) command is input during programming

80

10

FF

Figure 8.

00

Internal VPP

RY/BY

tRST (max 10 µs)

When a Reset (FFh) command is input during erasing

D0

FF

Figure 9.

00

Internal erase

voltage

RY/BY

tRST (max 500 µs)

When a Reset (FFh) command is input during Read operation

00

FF

Figure 10.

00

RY/BY

tRST (max 6 µs)

When a Status Read command (70h) is input after a Reset

FF

70

RY/BY

Figure 11.

I/O status : Pass/Fail → Pass

: Ready/Busy → Ready

FF

70

RY/BY

When two or more Reset commands are input in succession

(1)

FF

I/O status : Ready/Busy → Busy

Figure 12.

(2)

(3)

FF

FF

RY/BY

The second FF command is invalid, but the third FF command is valid.

2003-08-20A 23/33

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