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MT8941B
Data Sheet
Figure 15 - DPLL #1 in DIVIDE Mode
F0b VOH
VOL
VOH
C4b
VOL
VOH
C4o
VOL
VOH
C2o
VOL
VOH
C2o
VOL
tWFP
tFPL
tW4oH
tFPH
tW4oL
t4oLH
tfC4
t4oHL
t42HL
t42LH
tW2oL
tW2oH
tP2o
tfC2
t2oLH
tP4o
trC4
Figure 16 - Timing Information on DPLL #2 Outputs
trC2
t2oHL
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Zarlink Semiconductor Inc.