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MAX127ACAI(2012) 데이터 시트보기 (PDF) - Maxim Integrated

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MAX127ACAI
(Rev.:2012)
MaximIC
Maxim Integrated MaximIC
MAX127ACAI Datasheet PDF : 16 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
MAX127/MAX128
Multirange, +5V, 12-Bit DAS with
2-Wire Serial Interface
Table 1. Control-Byte Format
BIT 7
(MSB)
START
BIT 6
SEL2
BIT 5
SEL1
BIT 4
SEL0
BIT 3
RNG
BIT 2
BIP
BIT 1
PD1
BIT 0
PD0
BIT
7 (MSB)
6, 5, 4
3
2
1, 0 (LSB)
NAME
START
SEL2, SEL1,
SEL0
RNG
BIP
PD1, PD0
DESCRIPTION
The logic “1” received after acknowledge of a write bit (R/W = 0) defines the beginning of the
control byte.
These three bits select the desired “ON” channel (Table 2).
Selects the full-scale input voltage range (Table 3).
Selects unipolar or bipolar conversion mode (Table 3).
These two bits select the power-down modes (Table 4).
Table 2. Channel Selection
SEL2
0
0
0
0
1
1
1
1
SEL1
0
0
1
1
0
0
1
1
SEL0
0
1
0
1
0
1
0
1
CHANNEL
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
Table 4. Power-Down and Clock Selection
PD1 PD0
SEL0
0
X Normal Operation (always on)
1
0
Standby Power-Down Mode (STBYPD)
1
1
Full Power-Down Mode (FULLPD)
Table 3. Range and Polarity Selection
INPUT RANGE (V)
MAX127
0 to 5
0 to 10
±5
±10
MAX128
0 to VREF/2
0 to VREF
±VREF/2
±VREF
RNG
BIP
0
0
1
0
0
1
1
1
0
0
1
0
0
1
1
1
NEGATIVE FULL
SCALE (V)
-VREF x 1.2207
-VREF x 2.4414
-VREF/2
-VREF
ZERO
SCALE (V)
0
0
0
0
0
0
0
0
FULL SCALE (V)
VREF x 1.2207
VREF x 2.4414
VREF x 1.2207
VREF x 2.4414
VREF/2
VREF
VREF/2
VREF
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