CP348 데이터시트 - Central Semiconductor
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CP348
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Central Semiconductor
PROCESS DETAILS
Process EPITAXIAL PLANAR
Die Size 82 x 82 MILS
Die Thickness 9.1 MILS
Base Bonding Pad Area 13 x 17 MILS
Emitter Bonding Pad Area 13 x 25 MILS
Top Side Metalization Al-Si - 40,000Å
Back Side Metalization Ti/Ni/Ag - 2,000Å/3,000Å/20,000Å
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제조사
Small Signal Transistor NPN - High Current Transistor Chip ( Rev : 2002 )
Central Semiconductor
Small Signal Transistor NPN - High Current Transistor Chip ( Rev : 2002 )
Central Semiconductor
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