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7641

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

Mitsumi 

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MITSUBISHI MICROCOMPUTERS

7641 Group

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

Table 7 Interrupt vector addresses and priority

Vector Addresses (Note 1)

Interrupt Source Priority

High

Low

Interrupt Request

Generating Conditions

Remarks

Reset (Note 3)

1

FFFB16

FFFA16 At reset

Non-maskable

USB function

2

FFF916

FFF816 (Note 2)

USB SOF

3

FFF716

FFF616 At reception of SOF packet

INT0

4

FFF516

FFF416 At detection of either rising or falling edge of External interrupt

INT0 intput

(active edge selectable)

INT1

5

FFF316

FFF216 At detection of either rising or falling edge of External interrupt

INT1 input

(active edge selectable)

DMAC0

6

FFF116

FFF016 At completion of DMAC0 transfer

DMAC1

7

FFEF16

FFEE16 At completion of DMAC1 transfer

UART1 receive 8

buffer full

FFED16

FFEC16 At completion of UART1 reception

UART1 transmit 9

FFEB16

FFEA16 At completion of UART1 transmission

UART1

10

summing error

FFE916

FFE816 At detection of UART1 summing error

UART2 receive 11

buffer full

FFE716

FFE616 At completion of UART2 reception

UART2 transmit 12

FFE516

FFE416 At completion of UART2 transmission

UART2

13

summing error

FFE316

FFE216 At detection of UART2 summing error

Timer X

14

FFE116

FFE016 At timer X underflow

Timer Y

15

FFDF16

FFDE16 At timer Y underflow

Timer 1

16

FFDD16

FFDC16 At timer 1 underflow

Timer 2

17

FFDB16

FFDA16 At timer 2 underflow

Timer 3

CNTR0

18

FFD916

FFD816 At timer 3 underflow

19

FFD716

FFD616 At detection of either rising or falling edge of External interrupt

CNTR0 input

(active edge selectable)

CNTR1

20

FFD516

FFD416 At detection of either rising or falling edge of External interrupt

CNTR1 input

(active edge selectable)

Serial I/O

21

FFD316

FFD216 At completion of serial I/O transmission/re-

ception

Input buffer full 22

FFD116

FFD016 At writing to input data bus buffer

Output buffer

empty

23

FFCF16

FFCE16 At reading from output data bus buffer

Key input (Key- 24

on wake-up)

BRK instruction 25

FFCD16

FFCB16

FFCC16

FFCA16

At falling of port P2 input logical level AND

At BRK instruction execution

External interrupt

(falling valid)

Non-maskable software interrupt

Notes 1: Vector addresses contain interrupt jump destination addresses.

2: USB function interrupt occurs owing to an interrupt request of the endpoint x (x = 0 to 4) IN, endpoint x OUT, overrun/underrun, USB reset or suspend/

resume.

3: Reset functions in the same way as an interrupt with the highest priority.

21

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