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MP3274

Fault Protected 32 Channel, 12-Bit Data Acquisition Subsystem

Exar Corporation 

MP3274

ELECTRICAL CHARACTERISTICS TABLE (CONT’D)

Description

25°C

Tmin to Tmax

Symbol Min Typ Max Min Max

Units

DIGITAL OUTPUTS

(Data Format 2’s Complement)

DB0/SDC–DB11/SDO, STS, STL

Logical “1” Voltage

Logical “0” Voltage

Tristate Leakage

POWER SUPPLIES

VOH

4.0

VOL

IOZ

–5

2.4

V

0.4

0.4 V

5

–5

5 µA

Operating Range

VDD

VCC

VEE

Operating Current

IDD

ICC

IEE

Power Dissipation

+4.5

+11.4

–4.75

+5.5

+16.5

–16.5

2

7

5

8

1.5

3

110 200

+4.5

+11.4

–4.75

+5.5 V

+16.5 V

–16.5 V

7 mA

8 mA

3 mA

200 mW

Conditions

COUT=15 pF

ISOURCE = 0.5 mA

ISINK = 1.6 mA

VOUT=GND to VDD

Tested at –11.4 and –16.5 only

NOTES

1 Tester measures code transitions by dithering the voltage of the analog input (VIN). The difference between the measured and the

ideal code width is the DNL error. The INL error is the maximum distance (in LSBs) from the best fit line to any transition voltage

2 Guaranteed. Not tested.

3 Specified values guarantee functionality. Refer to other parameters for accuracy.

4 Input bandwidth is a measure of performance of the A/D input stage (S/H + amplifier). Refer to other parameters for accuracy

within the specified bandwidth.

5 All channel input pins and ground reference pin have protection which becomes active above 60 V.

6 All digital inputs have diodes to VDD and AGND. Input DC currents will not exceed specified limits for any input voltage between GND

and VDD.

Specifications are subject to change without notice

ABSOLUTE MAXIMUM RATINGS (TA = +25°C unless otherwise noted)1, 2

VCC to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to +16.5 V

VEE to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to –16.5 V

VDD to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to +7 V

AGND to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±1 V

Digital Inputs/Outputs

to DGND . . . . . . . . . . . . . . . . . . . . . –0.5 V to VLOGIC +0.5 V

Analog Inputs (AIN0 – AIN31, GND REF)

to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±60 V

REF OUT . . . . . . . . . . . . . . . . . . . Indefinite short to DGND,

Momentary short to VCC

Maximum Junction Temperature . . . . . . . . . . . . . . . . . 150°C

Package Power Dissipation Rating to 75°C

PGA, PLCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1800 mW

Derates above 75°C . . . . . . . . . . . . . . . . . . . . . 25 mW/°C

Lead Temperature, Soldering . . . . . . . . . . . . 300°C, 10 Sec

Storage Temperature (Ceramic) . . . . . . . . –65°C to +150°C

NOTES:

1 Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a

stress rating only and functional operation at or above this specification is not implied. Exposure to maximum rating

conditions for extended periods may affect device reliability.

2 Any input pin which can see a value outside the absolute maximum ratings should be protected by Schottky diode clamps

(HP5082-2835) from input pin to the supplies. All logic inputs have protection diodes which will protect the device from

short transients outside the supplies of less than 100mA for less than 100µs.

Rev. 4.00

5

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