MC33689 데이터 시트보기 (PDF) - Motorola => Freescale
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MC33689 Datasheet PDF : 18 Pages
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Freescale SMeC3m36i8c9onductor, Inc.
(Vs1 and Vs2 from 5.5V to 18V and Tamb from -40°C to 125°C unless otherwise noted)
Description
Symbol
Characteristics
Unit
Min
Typ
Max
Conditions
Delay between CSB wake up (CSB low
to high) and first accepted SPI command
Tw-spi
90
N/A
us
SBC in stop mode
Delay between INT pulse and 1st SPI
command accepted
Ts-1stspi
30
N/A
us
In stop mode after wake up
The minimum time between two rising
edges on the CSB
T2csb
15
us
note 1: when IN input is set to high, delay starts at falling edge of clock cycle #8 of the SPI command and start of device activation/deactivation.
30mA load on HS switches. Excluding rise or fall time due to external load.
note 2: when IN used to control HS switches, delays measured betxween IN and HS1 or HS2 on /off. 30mA load on HS switches. Excluding
rise or fall time due to external load.
Rx: LIN physical layer output
Low Level Voltage Output
Vol
0
High Level Voltage Output
Voh
3.75
Tx: LIN physical layer input
Low Level Voltage Input
Vil
High Level Voltage Input
Vih
3.5
Input Threshold Hysteresis
Vinhyst
50
550
Pull-up Current Source
Is
-100
LIN: physical layer bus (Voltage Expressed versus Vsup Voltage)
Low Level Dominant Voltage
Vlin-low
High Level Voltage (Tx high, Iout = 1uA)
Vlin-high
Vsup-1
Pull up Resistor to Vsup
Rpu
20
30
Pull up current source
Ipu
1.3
Over current shutdown threshold
Iov-cur
50
75
Over current shutdown delay
Iov-delay
10
Leakage Current to GND
Ibus-pas-
0
3
rec
Gnd disconnected, Vgnd = Vsup, VLin at Ibus no
-1
-18V
gnd
Leakage Current to GND, Vsup Discon-
Ibus
1
nected, VLin at +18V
Lin Receiver Vil (Tx high, Rx low)
Lin-vil
0
Lin Receiver Vih (Tx high, Rx high)
LIN Receiver Threshold center
Lin-vih
0.6 VSUP
Lin-thres
0.475
0.5
LIN Receiver Input Hysteresis
LIN hyst
LIN wake up threshold
LIN wu
0.5
0.9
V
5.25
V
I in ≤ +1.5mA
I out ≤ 250uA
1.5
V
V
800
mV
-20
uA
1V <V(Tx) < 3.5V
1.4
V
external bus pull 500 Ohms
V
Recessive state
47
kohms In normal mode. In sleep and
stop mode if not turned off by
SPI
uA
In sleep and stop mode with
30k disconnected
150
mA
us
Guaranteed by design
20
uA Recessive state, Vsup 8V to
18V, Vlin 8V to 18V
1
mA
10
uA
0.4VSUP
VSUP
0.525
0.175
Vsup
Vsup
Vsup
Vsup disconnected
Vlin at +18V
(Lin-vih - Lin-vil) / 2
Lin-vih - Lin-vil
LIN physical layer: bus driver timing characteristics for normal slew rate (note 1)
Dominant propagation delay Tx to LIN
tdom min
50
Dominant propagation delay Tx to LIN
tdom max
50
Recessive propagation delay Tx to LIN
trec min
50
Recessive propagation delay Tx to LIN
trec max
50
Prop delay symmetry: tdom min - trec
dt1
-10.44
-
max
us
Measurement threshold
58.1% Vsup
us
Measurement threshold
28.4% Vsup
us
Measurement threshold
42.2% Vsup
us
Measurement threshold
74.4% Vsup
us
MC33689
8
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