MC33689 데이터 시트보기 (PDF) - Motorola => Freescale
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MC33689 Datasheet PDF : 18 Pages
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Freescale SMeCm33i6c89onductor, Inc.
2 ELECTRICAL CHARACTERISTICS
(Vs1 and Vs2 from 5.5V to 18V and Tamb from -40°C to 125°C unless otherwise noted)
Description
Symbol
Vs1 and Vs2 pins (Device power supply)
Nominal DC Voltage range
Input Voltage during Load Dump
Input Voltage during jump start
Supply Current in Normal Mode (note 2)
Vsup
VsupLD
VsupJS
Isup(norm)
Characteristics
Min
Typ
Max
5.5
18
40
27
5
7.5
Supply Current in Sleep Mode (note 2)
Supply Current in Stop Mode (note 2)
Isleep
Istop
30
40
60
75
Supply voltage fall early warning thresh- VSUVew
5.7
6
6.6
old
VSUV flag hysteresis
VSUVhyst
1
Supply voltage over voltage warning
threshold
VSOVw
18
19.25
20.50
VSOV flag hysteresis
VSOVhyst
220
note 1: Device is fully functional. All functions are operating. Over temperature may occur.
note 2: Total current (IVs1+IVs2) measured at gnd pins.
Unit
Conditions
V
V
Load dump situation
V
Jump start situation (note 1)
mA
Iout at Vdd =10mA, LIN
recessive state
uA
Vdd off, Vsup<=13.5V
uA
Vdd ON with Iout<100uA,
Vsup<=13.5V
V
Normal mode, INT gener-
ated, bit VSUV set
V
guaranteed by design
V
Normal mode, INT gener-
ated, bit VSOV set
mV
guaranteed by design
Vdd (external 5V output for MCU supply). Specification with external capacitor 2uF<C<10uF and 200mOhms<=ESR<=1O ohm.
Normal mode. Capacitor value up to 47uF chemical can be used.
Vdd Output Voltage
Vddout
4.75
5
5.25
V
Idd from 2 to 50mA
5.5V< Vsup <27V
Dropout Voltage (note 1)
Vdddrop
100
200
mV
Idd = 50mA (note 1)
Vsup > 4.5V
Idd output current limitation (note 2)
Idd
50
110
200
mA
Internally limited
Over temperature pre warning (junction)
Tpre
120
135
160
°C
Normal mode, INT gener-
ated, Bit VddT set
guaranteed by design
Thermal Shutdown (junction)
Tsd
155
170
°C
Normal mode
guaranteed by design
Temperature threshold difference
20
30
45
°C
Normal mode (Tsd-Tpre)
guaranteed by design
Vsup range for Reset Active
Vsupr
3.5
V
0.5<Vdd<Vdd (Rst-th1)
Line Regulation
LR
20
150
mV
5.5V<Vsup<27V, Idd=10mA
Load Regulation
LD
40
150
mV
1mA<IIdd<50mA
note 1: measured when voltage has dropped 100mV below its nominal value.
note 2: total Vdd regulator current. A 5mA current for operational amplifier operation is included. Digital output supplied from Vdd.
Vdd: in Stop mode
Vdd Output Voltage (note 1)
Vddstop
4.75
5,00
5.25
V
Idd<=2mA
Idd current capability (note 2)
Idds
4
8
14
mA
Stop mode
Line regulation
LR-s
10
100
mV
5.5V<Vsup<27V, Idd=2mA
Load regulation
LD-s
40
150
mV
1mA<IIdd<5mA
note 1: when switching from Normal mode to Stop mode, or from Stop mode to Normal mode the output voltage can varies within the output
voltage specification.
note 2: when Idd is above Idds device enters reset mode
Reset: normal and stop modes (output pin only)
Reset threshold
Rst-th1
4.50
High Level Output current
Ioh
Low Level Output Voltage (I0=1.5mA)
Vol
0
4.68
-250
Vdd-0.2
V
µA
0.9
V
Vout>0.7Vdd
4.5V<Vsup<27V
MC33689
4
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