M37640E8FP 데이터 시트보기 (PDF) - Mitsumi

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M37640E8FP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

Mitsumi 

Ver 1.4

MITSUBISHI MICROCOMPUTERS

7640 Group

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

The USB Endpoint x FIFO Registers, shown in Fig-

ure 1.70 through Figure 1.74, are the USB IN

(transmit) and OUT (receive) FIFO data registers.

The CPU writes data to these registers for the corre-

sponding Endpoint IN FIFO and reads data from

these registers for the corresponding Endpoint OUT

FIFO.

MSB

7

DATA_7

DATA_6 DATA_5

DATA_4 DATA_3

DATA_2

DATA_1

DATA_0

LSB

0

Data_7:0

Address: 006016

Access: R/W

Reset: N/A

Endpoint 0 IN/OUT FIFO register

Fig. 1.70. USB Endpoint 0 FIFO Register (USBFIFO0)

MSB

7

DATA_7

DATA_6

DATA_5

DATA_4

DATA_3

DATA_2

DATA_1

DATA_0

LSB

0

Data_7:0

Address: 006116

Access: R/W

Reset: N/A

Endpoint 1 IN/OUT FIFO register

Fig. 1.71. USB Endpoint 1 FIFO Register (USBFIFO1)

MSB

7

DATA_7

DATA_6

DATA_5 DATA_4 DATA_3

DATA_2

DATA_1

DATA_0

LSB

0

Data_7:0

Address: 006216

Access: R/W

Reset: N/A

Endpoint 2 IN/OUT FIFO register

Fig. 1.72. USB Endpoint 2 FIFO Register (USBFIFO)

MSB

7

DATA_7

DATA_6 DATA_5

DATA_4

DATA_3

DATA_2

DATA_1

DATA_0

LSB

0

Data_7:0

Address: 006316

Access: R/W

Reset: N/A

Endpoint 3 IN/OUT FIFO register

Fig. 1.73. USB Endpoint 3 FIFO Register (USBFIFO3)

MSB

7

DATA_7

DATA_6

DATA_5

DATA_4

DATA_3

DATA_2

DATA_1

DATA_0

LSB

0

Data_7:0

Address: 006416

Access: R/W

Reset: N/A

Endpoint 4 IN/OUT FIFO register

Fig. 1.74. USB Endpoint 4 FIFO Register (USBFIFO4)

64

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