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LT5524

Low Distortion IF Amplifier/ADC Driver with Digitally Controlled Gain

Linear Technology 

LT5524

APPLICATIO S I FOR ATIO

Input Interface

For the lowest noise and highest linearity, the LT5524

should be driven with a differential input signal. Single-

ended drive will severely degrade linearity and noise

performance.

Example input matching networks are shown in Figures 3

and 4.

Input matching network design criteria are:

• DC block the LT5524 internal bias voltage (see Input

Bias Voltage section for DC coupling information)

• Match the source impedance to the LT5524, RIN ≅ 122Ω

• Provide well balanced differential input drive (capacitor

C2 in Figure 4)

• Minimize insertion loss to avoid degrading the noise

figure (NF)

R1

50Ω

VSRC R2

50Ω

C1

IN+

C2

IN–

LT5524

–

RIN

122Ω

+

LT5524 F03

Figure 3. Input Capacitively-Coupled to a Differential Source

RSRC

50Ω

VSRC

T1

1:2

••

•

IN+

IN–

C2

0.33µF

LT5524

–

RIN

122Ω

+

LT5524 F04

Figure 4. Input Transformer-Coupled to a Single-Ended Source

Output Interface

The output interface network provides an impedance

transformation between the actual load impedance, RLOAD,

and the LT5524 output loading, ROUT, chosen to maximize

power or linearity, or to minimize output noise, or for some

other criteria as explained in the following sections.

Two examples of output matching networks are shown in

Figures 5 and 6 (as implemented in the LT5524 demo

boards).

IN+

LT5524

–

RIN

IN–

122Ω

+

C3

R1 R2

51Ω 51Ω C1

ROUT

C2

VOSUP

RLOAD

50Ω

RLOAD

50Ω

LT5524 F05

Figure 5. Output Impedance-Matched

and Capacitively Coupled to a Differential Load

Note: In Figure 5, (choke) inductors may be placed in

parallel with or used to replace resistors R1 and R2, thus

eliminating the DC voltage drop across these resistors.

IN+

LT5524

–

RIN

IN–

122Ω

+

RMATCH

255Ω

(OPTIONAL)

ROUT

C1

T2

4:1

••

•

VOSUP

RLOAD

50Ω

LT5524 F06

Figure 6. Output Impedance-Matched and

Transformer-Coupled to a Single-Ended Load

Output network design criteria are:

• Provide DC isolation between the LT5524 DC output

voltage and RLOAD.

• Provide a path for the output DC current from the output

voltage source VOSUP.

• Provide an impedance transformation, if required, be-

tween the load impedance, RLOAD, and the optimum

ROUT loading.

• Set the bandwidth of the output network.

• Optional: Provide board output impedance matching

using resistor RMATCH (when driving a transmission

line).

• Use high linearity passive parts to avoid introducing

noninearity.

Note that there is a noise penalty of up to 6dB when using

power delivered by only one output in Figure 5.

5524f

9

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