LT5524 데이터 시트보기 (PDF) - Linear Technology
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LT5524 Datasheet PDF : 16 Pages
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LT5524
AC ELECTRICAL CHARACTERISTICS VCC = 5V, VCCO = 5V, EN = 3V, TA = 25°C, ROUT = 200Ω. Maximum gain
specifications are with respect to differential inputs and differential outputs, unless otherwise noted.
(Note 7) (Test circuits shown in Figures 9 and 10)
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX UNITS
Dynamic Performance
BW
Large-Signal –3dB Bandwidth
VOUT(CLIP) Output Voltage Clipping Levels
POUT(MAX) Clipping Limited Maximum Sinusoidal
Output Power
gm
Amplifier Transconductance
S12
Reverse Isolation
Distortion and Noise
All Gain Settings (Note 8), ROUT = 100Ω
Each OUT+, OUT– with Respect to Ground
(Note 11)
All Gain Settings, Single Tone,
fIN = 100MHz (Note 10)
Max Gain, fIN = 100MHz
fIN = 100MHz (Note 9)
LF to 540
MHz
2
8
V
16
dBm
0.15
S
– 92
dB
OIP3
Output Third Order Intercept Point for
POUT = 4dBm (Each Tone), 200kHz Tone Spacing,
PGA0 = High (PGA1, PGA2, PGA3 Any State) fIN = 100MHz
+40
Output Third Order Intercept Point for
POUT = 4dBm (Each Tone), 200kHz Tone Spacing,
PGA0 = Low (PGA1, PGA2, PGA3 Any State) fIN = 100MHz
+36
HD2
Second Harmonic Distortion
POUT = 5dBm (Single Tone), fIN = 50MHz
– 76
HD3
Third Harmonic Distortion
POUT = 5dBm (Single Tone), fIN = 50MHz
–72
NFLOOR Output Noise Floor
PGA1 = High, fIN = 100MHz
–138
(PGAO, PGA2, PGA3 Any State)
PGA1 = Low, fIN = 100MHz
–140
NF
Noise Figure
Max Gain Setting, fIN = 100MHz
8.6
PGA Settling Time
Output Settles within 10% of Final Value
500
Enable/Disable Time
Output Settles within 10% of Final Value
600
dBm
dBm
dBc
dBc
dBm/Hz
dBm/Hz
dB
ns
ns
Amplifier Power Gain and Gain Step
GMAX
Maximum Gain
fIN = 20MHz and 200MHz
GMIN
Minimum Gain
fIN = 20MHz and 200MHz
GSTEP
Gain Step Size
fIN = 20MHz and 200MHz
Gain Step Accuracy
fIN = 20MHz and 200MHz
Amplifier I/O Impedance (Parallel Values, Specified Differentially)
RIN
Input Resistance
CIN
Input Capacitance
RO
Output Resistance
CO
Output Capacitance
fIN = 100MHz
fIN = 100MHz
fIN = 100MHz
fIN = 100MHz
27
dB
4.5
dB
0.8
1.5
2.2
dB
±0.2
dB
122
Ω
2
pF
5
kΩ
1.7
pF
Note 1: Absolute Maximum Ratings are those values beyond which the life
of the device may be impaired.
Note 2: All voltage values are with respect to ground.
Note 3: Default state for open PGA inputs.
Note 4: VCC1 and VCC2 (Pins 2 and 19) are internally connected.
Note 5: External VOSUP is adjusted such that VCCO output pin common
mode voltage is as specified when resistors are used. For choke inductors
or transformer, VOSUP = VCCO = 5V typ.
Note 6: Internally generated common mode input bias voltage requires
capacitive or transformer coupling to the signal source.
Note 7: Specifications over the –40°C to 85°C operating temperature
range are assured by design, characterization and correlation with
statistical process controls. Gain always refers to power gain. Input
matching is assumed. PIN is the available input power. POUT is the power
into the external load, ROUT, as seen by the LT5524 differential outputs. All
dBm figures are with respect to 50Ω.
Note 8: High frequency operation is limited by the RC time constants at
the input and output ports. The low frequency (LF) roll-off is set by I/O
interface choice.
Note 9: Limited by package and board isolation.
Note 10: See “Clipping Free Operation” in the Applications Information
section. Refer to Figure 7.
Note 11: Although the instantaneous AC voltage on the OUT+ or OUT– pins
may in some situations safely exceed 8V (with respect to ground), in no
case should the DC voltage on these pins be allowed to exceed the
ABSMAX tested limit of 7V.
5524f
4
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