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LT5524

Low Distortion IF Amplifier/ADC Driver with Digitally Controlled Gain

Linear Technology 

LT5524

APPLICATIO S I FOR ATIO

Circuit Operation

The LT5524 is a high linearity amplifier with high imped-

ance output (Figure 1). It consists of the following

sections:

• An input variable attenuator “gain-control” block with

122Ω input impedance

• A differential transconductance amplifier, with enable

input

• An internal bias block with internal voltage regulator

• A gain control logic block

The LT5524 amplifier provides amplification with very low

distortion using a linearized open-loop architecture. In

contrast with high linearity amplifiers employing negative

feedback, the LT5524 offers:

• Stable operation for any practical load

• A capacitive output reactance (not inductive) that pro-

vides peaking free AC response to capacitive loads

• Exceptional reverse isolation of –100dB at 50MHz and

–78dB at 300MHz (package and board leakage limited)

The LT5524 is a transconductance amplifier and its opera-

tion can be understood conceptually as consisting of two

steps: First, the input signal voltage is converted to an

output current. The intermodulation distortion (in dBc) of

the LT5524 output current is determined by the input

signal level, and is almost independent of the output load

conditions. Thus, the LT5524’s input IP3 is also nearly

independent of the output load.

Next, the external output load (ROUT) converts the output

current to output voltage (or power). The LT5524’s volt-

age and power gain both increase with increasing ROUT.

Accordingly, the output power and output IP3 also in-

crease with increasing ROUT. The actual output linearity

performance in the application will thus be set by the

choice of output load, as well as by the output network.

Maximum Gain Calculation

The maximum power gain (with the 0dB attenuation step)

is:

GPWR(dB) = 10 • log(gm2 • RIN • ROUT)

8

where:

gm is the LT5524 transconductance = 0.15S.

RIN is the LT5524 differential input impedance ≅ 122Ω.

Input impedance matching is assumed.

ROUT is the external differential output impedance as

seen by the LT5524’s differential outputs. ROUT should

be distinguished from the actual load impedance, RLOAD,

which will typically be coupled to the LT5524 output by

an impedance transformation network.

The power gain as a function of ROUT is plotted in Figure 2.

The ideal relationship is linear. The curved line indicates

the roll-off due to the finite (noninfinite) output resistance

of the LT5524.

45

40

35

30

25

20

15

10

5

0

20

100

ROUT (Ω)

IDEAL

WITH RO

1000 2000

5524 F02

Figure 2. Power Gain as a Function of ROUT

The actual available output power (as well as power gain

and OIP3) will be reduced by losses in the output interface,

consisting of:

• The insertion loss of the output impedance transforma-

tion network (for example the transformer insertion

loss in Figure 6)

• About –3dB loss if a matching resistor (RMATCH in

Figure 6) is used to provide output load impedance

back-matching (for example when driving transmis-

sion lines)

5524f

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