GF9105A 데이터 시트보기 (PDF) - Unspecified

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GF9105A

Component Digital Transcoder

Unspecified 

OUTPUT/INPUT = 0

13

P112..0

13

P212..0

13

P312..0

P410..0

11

13

C1

13

C2

13

C3

11

C4

13

P512..0

13

P612..0

13

P712..0

11

P810..0

13

C5

13

C6

13

C7

11

C8

BI-DIRECTIONAL

DATA PORTS

GF9105A SIGNAL

PROCESSING CORE

Fig. 4a Functional Block Diagram of GF9105A

(OUTPUT/INPUT = 0, HVF_OUT = 0)

OUTPUT/INPUT = 0

P112/HOUT

12

P111..0

P212/VOUT

12

P211..0

P312/FOUT

12

P311..0

11

P410..0

} 12

C1

} 12

C2

} 12

C3

11

}C4

P5

12

12

P5

11..0

P6

12

12

P6

11..0

P7

12

12

P7

11..0

P8

11

10..0

BI-DIRECTIONAL

DATA PORTS

} 12

C5

}12

C6

}12

C7

} 11

C8

GF9105A SIGNAL

PROCESSING CORE

Fig. 4c Functional Block Diagram of GF9105A

(OUTPUT/INPUT = 0, HVF_OUT = 1)

OUTPUT/INPUT = 1

13

P1

12..0

13

P2

12..0

13

P3

12..0

11

P4

10..0

13

C1

13

C2

13

C3

11

C4

13

P5

12..0

13

P6

12..0

13

P7

12..0

11

P8

10..0

13

C5

13

C6

13

C7

11

C8

BI-DIRECTIONAL

DATA PORTS

GF9105A SIGNAL

PROCESSING CORE

Fig. 4b Functional Block Diagram of GF9105A

(OUTPUT/INPUT = 1, HVF_OUT = 0)

OUTPUT/INPUT = 1

P112/HOUT

12

P111..0

P212/VOUT

12

P211..0

P312/FOUT

12

P311..0

11

P410..0

} 12

C1

} 12

C2

12

}C3

11

}C4

P5

12

12

P5

11..0

P6

12

12

P6

11..0

P7

12

12

P7

11..0

11

P8

10..0

BI-DIRECTIONAL

DATA PORTS

} 12

C5

} 12

C6

} 12

C7

} 11

C8

GF9105A SIGNAL

PROCESSING CORE

Fig. 4d Functional Block Diagram of GF9105A

(OUTPUT/INPUT = 1, HVF_OUT = 1)

5

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