AD1836AASZ 데이터 시트보기 (PDF) - Analog Devices
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AD1836AASZ Datasheet PDF : 24 Pages
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AD1836A
Data Sheet
Table 15. DAC Control Register 2
Address
15, 14, 13, 12
0001
RD/WR
11
0
Reserved
10, 9, 8, 7, 6
00000
DAC Mute
DAC3R
5
0 = On
1 = Mute
DAC3L
4
0 = On
1 = Mute
DAC2R
3
0 = On
1 = Mute
DAC2L
2
0 = On
1 = Mute
DAC1R
1
0 = On
1 = Mute
DAC1L
0
0 = On
1 = Mute
Table 16. DAC Volume Registers
Address
15, 14, 13, 12
0010: DAC1L
0011: DAC1R
0100: DAC2L
0101: DAC2R
0110: DAC3L
0111: DAC3R
RD/WR
11
0
Reserved
10
0
Function
Volume
9:0
0 to 1023 in 1024 Linear Steps
Table 17. ADC Control Register 1
Address
15, 14, 13, 12
1100
RD/WR
11
0
Reserved
10, 9
00
Function
Filter
8
0 = DC
1 = High Pass
Power-Down
7
0 = Normal
1 = PWRDWN
Sample Rate
6
0 = 48 kHz
1 = 96 kHz
Left Gain
5, 4, 3
000 = 0 dB
001 = 3 dB
010 = 6 dB
011 = 9 dB
100 = 12 dB
101 = Reserved
110 = Reserved
111 = Reserved
Right Gain
2, 1, 0
000 = 0 dB
001 = 3 dB
010 = 6 dB
011 = 9 dB
100 = 12 dB
101 = Reserved
110 = Reserved
111 = Reserved
Table 18. ADC Control Register 2
Packed Mode: Eight channels are “packed” in ASDATA1 serial output. Packed Mode 128: Refer to Figure 5. Packed Mode 256: Refer to Figure 6.
Packed Mode AUX: Refer to Figure 9 to Figure 11. Note that Packed AUX mode affects the entire chip, including the DAC serial mode.
Address
15, 14, 13, 12
1101
RD/WR
11
0
Reserved
10
0
Master/Slave
AUX Mode
9
0 = Slave
1 = Master
SOUT Mode
8, 7, 6
000 = I2S
001 = RJ
010 = DSP
011 = LJ
100 = Packed Mode 256
101 = Packed Mode 128
110 = Packed Mode AUX
Word Width
5, 4
00 = 24 Bits
01 = 20 Bits
10 = 16 Bits
11 = Reserved
ADC Mute
ADC2R ADC2L
3
2
0 = On 0 = On
1 = Mute 1 = Mute
ADC1R
1
0 = On
1 = Mute
ADC1L
0
0 = On
1 = Mute
Rev. A | Page 20 of 24
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