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Data Sheet
AD1836A
30MHz
12.288MHz
SHARC
SHARC IS ALWAYS
RUNNING IN SLAVE MODE
(INTERRUPT-DRIVEN)
LRCLK
ADC NO. 1 BCLK
SLAVE DATA
MCLK
LRCLK
ADC NO. 2 BCLK
SLAVE DATA
MCLK
ASDATA1 ALRCLK ABCLK DSDATA1
DLRCLK/AUXLRCLK
DSDATA2/AAUXDATA1
DSDATA3/AAUXDATA2
MCLK
DBCLK/AUXBCLK (64fS)
ASDATA2/DAUXDATA
AD1836A
MASTER
Figure 10. AUX Mode Connection to SHARC (Master Mode)
LRCLK
BCLK
DATA
MCLK
DAC
30MHz
12.288MHz
SHARC
SHARC IS ALWAYS
RUNNING IN SLAVE MODE
(INTERRUPT-DRIVEN)
LRCLK
ADC NO. 1 BCLK
MASTER DATA
MCLK
LRCLK
ADC NO. 2 BCLK
SLAVE DATA
MCLK
ASDATA1 ALRCLK ABCLK DSDATA1
DLRCLK/AUXLRCLK
DSDATA2/AAUXDATA1
DSDATA3/AAUXDATA2
MCLK
DBCLK/AUXBCLK (64fS)
ASDATA2/DAUXDATA
AD1836A
SLAVE
Figure 11. AUX Mode Connection to SHARC (Slave Mode)
LRCLK
BCLK
DATA
MCLK
DAC
Rev. A | Page 17 of 24