AD1836A
Data Sheet
LRCLK
BCLK
SDATA
MSB
LEFT CHANNEL
RIGHT CHANNEL
LSB
MSB
LEFT JUSTIFIED MODE––16 BITS TO 24 BITS PER CHANNEL
LSB
LRCLK
BCLK
SDATA
MSB
LEFT CHANNEL
RIGHT CHANNEL
LSB
MSB
I2S MODE––16 BITS TO 24 BITS PER CHANNEL
LSB
LRCLK
BCLK
SDATA
LEFT CHANNEL
RIGHT CHANNEL
MSB
LSB
MSB
RIGHT JUSTIFIED MODE––SELECT NUMBER OF BITS PER CHANNEL
LSB
LRCLK
BCLK
SDATA
MSB
LSB
MSB
LSB
DSP MODE––16 BITS TO 24 BITS PER CHANNEL
1/fS
NOTES
1. DSP MODE DOES NOT IDENTIFY CHANNEL
2. LRCLK NORMALLY OPERATES AT fS EXCEPT FOR DSP MODE WHICH IS 2 × fS
3. BCLK FREQUENCY IS NORMALLY 64 × LRCLK BUT MAY BE OPERATED IN BURST MODE
Figure 4. Stereo Serial Modes
Rev. A | Page 14 of 24