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IDT72510L25J

BUS-MATCHING BIDIRECTIONAL FIFO 512 x 18-BIT – 1024 x 9-BIT 1024 x 18-BIT – 2048 x 9-BIT

Integrated Device Technology 

IDT72510, IDT72520

BUS MATCHING BIDIRECTIONAL FIFO

COMMERCIAL TEMPERATURE RANGE

RESET COMMAND FUNCTIONS

Reset

Operands

Function

000

No Operation

001

Reset B→A FIFO (Read, Write, and Rewrite

Pointers = 0)

010

Reset A→B FIFO (Read, Write, and Reread

Pointers = 0)

011

Reset B→A and A→B FIFO

100

Reset Internal DMA Request Circuitry

101

No Operation

110

No Operation

111

Reset All

Table 3. Reset Command Functions

2669 tbl 06

6420H, and Configuration Registers 5 and 7 are 0000H.

Additionally, Status Register format 0 is selected, all the

pointers including the Reread and Rewrite Pointers are set to

0, the odd byte register valid bit is cleared, the DMA direction

is set to B→A write, the internal DMA request circuitry is

cleared (set to its initial state), and all parity errors are cleared.

A software reset command can reset A→B pointers and

the B→A pointers to 0 independently or together. The request

(REQ) DMA circuitry can also be reset independently. A

software Reset All command resets all the pointers, the DMA

request circuitry, and sets all the Configuration Registers to

their default condition. Note that a hardware reset is NOT the

same as a software Reset All command. Table 7 shows the

BiFIFO state after the different hardware and software resets.

SELECT CONFIGURATION REGISTER

COMMAND FUNCTIONS

Operands

Function

000

Select Configuration Register 0

001

Select Configuration Register 1

010

Select Configuration Register 2

011

Select Configuration Register 3

100

Select Configuration Register 4

101

Select Configuration Register 5

110

Select Configuration Register 6

111

Select Configuration Register 7

2669 tbl 07

Table 4. Select Configuration Register Command Functions.

DMA DIRECTION COMMAND FUNCTIONS

Operands

Function

XX0

Write B→A FIFO

XX1

Read A→B FIFO

2669 tbl 08

Table 5. Set DMA Direction Command Functions. Command Only

Operates in Peripheral Interface Mode

STATUS REGISTER FORMAT COMMAND

FUNCTIONS

Operands

Function

XX0

Status Register Format 0

XX1

Status Register Format 1

2669 tbl 09

Table 6. Command Functions to Set the Status Register Format

STATE AFTER RESET

Configuration Registers 0-3

Configuration Register 4

Configuration Register 5

Configuration Register 7

Status Register format

B→A Read, Write, Rewrite

Pointers

A→B Read, Write, Reread

Pointers

Odd byte register valid bit

DMA direction

DMA internal request

Parity errors

Hardware Reset

(RS asserted)

0000H

6420H

0000H

0000H

0

0

B→ A (001)

—

—

—

—

—

0

Software Reset

A→B (010) B→A and

A→B (011)

—

—

—

—

—

—

—

—

—

—

—

0

Internal

Request

(100)

—

—

—

—

—

—

0

—

0

0

—

clear

B→ A write

clear

clear

clear

—

clear

—

—

—

—

—

—

—

—

clear

—

—

—

—

Table 7. The BiFIFO State After a Reset Command

All (111)

0000H

6420H

0000H

0000H

—

0

0

clear

—

clear

—

2669 tbl 10

5.31

11

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