CS5111 데이터 시트보기 (PDF) - Cherry semiconductor
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CS5111
Cherry semiconductor
CS5111 Datasheet PDF : 10 Pages
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Application Notes: continued
Pole due to error amplifier
output impedance and C1
A
fz = 1/2πR4C1
G
B
+G C
error amplifier gain
fP = 1/πR4C2
-20dB/dec
fP = 1/π RLoadCOUT
fCO
0
modulator gain + feedback resistor divider attenuation
-G
fz = 1/2π ESR COUT
Figure 10. Bode plot of error amplifier (OTA) gain and modulator gain
added to the feedback resistor divider attenuation.
A pole at point C:
fp = 1/(πR4C2),
(8g)
offsets the zero set by the ESR of the output capacitors.
An alternative scheme uses a single capacitor as shown in
Figure 11, to roll the gain off at a relatively low frequency.
VIN
VOUT = 18V, Select > 2V
VOUT = 16V, Select < 0.8V
L=33µH
COUT (2)
88µF
R1 100kΩ
VIN
NC
NC
VSW
Gnd
ENABLE
VREG
VLIN
IBIAS
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
R2 946Ω
R3 7.5kΩ
(1) VFB1
VFB2
RESET
CDelay
SELECT WDI
CCOMP
0.33µF
COMP COSC
5V
100µF
ESR<8Ω
RBIAS = 64.9kΩ
MICROPROCESSOR
COSC
390pF
Cdelay
0.1µF
Figure 11. A typical application diagram with external components con-
figured in a boost topology.
Step 9
Finally the watchdog timer period and Power on Reset
time is determined by:
tDelay = 1.353 × CDelayRBIAS.
(9)
Linear Regulator Output Current vs. Input Voltage
100
100
75
50
ΘJA = 55°C/W
VIN = 14V
Max Total Power = 1.18W
25
75
ΘJA = 35°C/W
50
VIN = 14V
Max Total Power = 1.86W
25
0
0
0
5
10
15
20
25
30
VREG (V)
0
5
10
15
20
25
30
VREG (V)
Figure 12: The shaded area shows the safe operating area of the CS5111 as a function of ILIN, VREG, and ΘJA. Refer to the table below for typical
loads and voltages.
VREG
VIN
(V)
(V)
ILIN
(mA)
Linear Power
Dissipation
(W)
Worst Case Switcher
Power Available
(ΘJA = 55°C/W)
(W)
Worst Case Switcher
Power Available
(ΘJA = 35°C/W)
(W)
20
14
25
0.44
0.74
1.42
20
14
50
0.83
0.35
1.03
20
14
75
1.22
*
0.64
20
14
100
1.60
*
0.26
25
14
25
0.60
0.58
1.26
25
14
50
1.11
0.07
0.75
25
14
75
1.62
*
0.24
25
14
100
2.14
*
*
* Subjecting the CS5111 to these conditions will exceed the maximum total power that the part can handle, thereby forcing it into thermal limit.
9
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