Functional Description[1]
The CY7C1441AV33/CY7C1443AV33/CY7C1447AV33 are 3.3V, 1M x 36/2M x 18/512K x 72 Synchronous Flow-through SRAMs, respectively designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version). A 2-bit on-chip counter captures the first address in a burst and increments the address automatically for the rest of the burst access.

FEATUREs
• Supports 133-MHz bus operations
• 1M x 36/2M x 18/512K x 72 common I/O
• 3.3V core power supply
• 2.5V or 3.3V I/O power supply
• Fast clock-to-output times
   — 6.5 ns (133-MHz version)
• Provide high-performance 2-1-1-1 access rate
• User-selectable burst counter supporting Intel® Pentium® interleaved or linear burst sequences
• Separate processor and controller address strobes
• Synchronous self-timed write
• Asynchronous output enable
• CY7C1441AV33, CY7C1443AV33 available in
   JEDEC-standard lead-free 100-pin TQFP package,
   lead-free and non-lead-free 165-ball FBGA package.
   CY7C1447AV33 available in lead-free and non-lead-free
   209-ball FBGA package
• IEEE 1149.1 JTAG-Compatible Boundary Scan
• “ZZ” Sleep Mode option