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전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크

SCY99080CDWR2G 데이터 시트보기 (PDF) - ON Semiconductor

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SCY99080CDWR2G Datasheet PDF : 27 Pages
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DDA002C
Pin Function Description
Pin No. Pin Name
1
BO
Function
Brownout
2
CIG
Warmup time
3
DGS
Synchronous output clamp
4
SS
Softstart
5
R_Fmin Minimum frequency resistor
6
R_Fmax
Maximum frequency
resistor
7
FB
Optocoupler connection
8
OTP_latch
OTP latch input
9
DT
10
EN1
11
EN2
Dead time
Enable input 1
Enable input 2
12
Lgs
Lower gate signal
13
Hgs
Upper gate signal
14
GND
Ground
15
Lgd
Lowside driver
16
Vcc
Controller Supply
17
HB
HalfBridge
18
Hgd
Highside driver
19
Boot
High side driver supply line
Pin Description
Detects low input voltage conditions and stops the controller. An internal
current source sets the hysteresis.
A capacitor connected to ground sets the preheat time for ballast applica-
tions.
A resistor connected between this pin and ground adjusts the maximum on
time available on Lgs and Hgs pins.
Monitors the softstart capacitor voltage to recognize end of the softstart
period, discharges the softstart capacitor during any IC restart.
Connecting a resistor between this pin and ground, sets the minimum oscil-
lator frequency reached for VFB 5.1 V
A resistor connected between this pin and ground sets the maximum fre-
quency excursion reached for VFB 1.2 V
An optocoupler connected (by collector) between this pin and ground (by
emitter) changes the converter operating frequency. The switching frequency
increases when optocoupler pulls the FB pin down to ground.
If the voltage on this pin decreases below 1.5 V, the circuit latches off. This
pin sources 170 mA current so an NTC resistor can be connected directly to
this pin.
A resistor connected between this pin and ground sets the deadtime
between drivers.
When the voltage level on this pin exceeds a reference level for more than
50 ms, all pulses are stopped and the circuit permanently latches off.
When the voltage level on this pin exceeds a reference voltage, the circuit
stops pulsing. The IC autorestarts via full startup sequence (PFC delay,
preheat, softstart) when EN2 is released.
Duplicates the lower gate signal for synchronization purposes. On time is
limited based on the Rdgs resistor value.
Duplicates the upper gate signal for synchronization purposes. On time is
limited based on the Rdgs resistor value.
The controller ground
Drives the lowside halfbridge MOSFET
Energizing the controller. This pin accepts voltage up to 20 Vdc
Connects to the halfbridge output
Drives the highside halfbridge MOSFET
This pin supplies the internal highside driver
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