MAX192ACAP 데이터 시트보기 (PDF) - Maxim Integrated
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MAX192ACAP Datasheet PDF : 24 Pages
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Low-Power, 8-Channel,
Serial 10-Bit ADC
ABSOLUTE MAXIMUM RATINGS
VDD to AGND........................................................... -0.3V to +6V
AGND to DGND.................................................... -0.3V to +0.3V
CH0–CH7 to AGND, DGND ...................... -0.3V to (VDD + 0.3V)
CH0–CH7 Total Input Current.......................................... ±20mA
VREF to AGND .......................................... -0.3V to (VDD + 0.3V)
REFADJ to AGND...................................... -0.3V to (VDD + 0.3V)
Digital Inputs to DGND.............................. -0.3V to (VDD + 0.3V)
Digital Outputs to DGND ........................... -0.3V to (VDD + 0.3V)
Digital Output Sink Current .................................................25mA
Continuous Power Dissipation (TA = +70°C)
Plastic DIP (derate 11.11mW/°C above +70°C) ......... 889mW
SO (derate 10.00mW/°C above +70°C) ...................... 800mW
SSOP (derate 8.00mW/°C above +70°C) ................... 640mW
CERDIP (derate 11.11mW/°C above +70°C) .............. 889mW
Operating Temperature Ranges
MAX192_C_P ..................................................... 0°C to +70°C
MAX192_E_P .................................................. -40°C to +85°C
MAX192_MJP ............................................... -55°C to +125°C
Storage Temperature Range ............................ -60°C to +150°C
Lead Temperature (soldering, 10sec) ............................ +300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VDD = 5V ±5%, fCLK = 2.0MHz, external clock (50% duty cycle), 15 clocks/conversion cycle (133ksps), 4.7µF capacitor at VREF pin,
TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER
DC ACCURACY (Note 1)
Resolution
Relative Accuracy (Note 2)
Differential Nonlinearity
Offset Error
Gain Error
Gain Temperature Coefficient
SYMBOL
CONDITIONS
DNL
MAX192A
MAX192B
No missing codes over temperature
External reference, 4.096V
External reference, 4.096V
MIN TYP MAX UNITS
10
Bits
±1/2
LSB
±1
±1
LSB
±2
LSB
±2
LSB
±0.8
ppm/°C
Channel-to-Channel
Offset Matching
±0.1
LSB
DYNAMIC SPECIFICATIONS (10kHz sine-wave input, 4.096Vp-p, 133ksps, 2.0MHz external clock)
Signal-to-Noise + Distortion Ratio SINAD
66
dB
Total Harmonic Distortion
(up to the 5th harmonic)
THD
-70
dB
Spurious-Free Dynamic Range
Channel-to-Channel Crosstalk
Small-Signal Bandwidth
Full-Power Bandwidth
CONVERSION RATE
Conversion Time (Note 4)
Track/Hold Acquisition Time
Aperture Delay
Aperture Jitter
Internal Clock Frequency
SFDR
65kHz, VIN = 4.096Vp-p (Note 3)
-3dB rolloff
tCONV
tAZ
Internal clock
External clock, 2MHz, 12 clocks/conversion
70
dB
-75
dB
4.5
MHz
800
kHz
5.5
10
µs
6
1.5
µs
10
ns
<50
ps
1.7
MHz
2 _______________________________________________________________________________________
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