IDT7026L35G 데이터 시트보기 (PDF) - Integrated Device Technology
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IDT7026L35G Datasheet PDF : 18 Pages
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IDT7026S/L
High-Speed 16K x 16 Dual-Port Static RAM
Military, Industrial and Commercial Temperature Ranges
Truth Table I – Non-Contention Read/Write Control
Inputs(1)
Outputs
CE
R/W
OE
UB
LB
SEM
I/O8-15
I/O0-7
Mode
H
X
X
X
X
H
High-Z
High-Z Deselected: Power-Down
X
X
X
H
H
H
High-Z
High-Z Both Bytes Deselected
L
L
X
L
H
H
DATAIN
High-Z Write to Upper Byte Only
L
L
X
H
L
H
High-Z
DATAIN Write to Lower Byte Only
L
L
X
L
L
H
DATAIN
DATAIN Write to Both Bytes
L
H
L
L
H
H
DATAOUT High-Z Read Upper Byte Only
L
H
L
H
L
H
High-Z DATAOUT Read Lower Byte Only
L
H
L
L
L
H
DATAOUT DATAOUT Read Both Bytes
X
X
H
X
X
X
High-Z
High-Z Outputs Disabled
NOTE:
1. A0L — A13L ≠ A0R — A13R.
2939 tbl 04
Truth Table II – Semaphore Read/Write Control(1)
Inputs
Outputs
CE
R/W
OE
UB
LB
SEM
I/O8-15
I/O0-7
Mode
H
H
L
X
X
L
DATAOUT DATAOUT Read Data in Semaphore Flag
X
H
L
H
H
L
DATAOUT DATAOUT Read Data in Semaphore Flag
H
↑
X
X
X
L
DATAIN
DATAIN Write I/O0 into Semaphore Flag
X
↑
X
H
H
L
DATAIN
DATAIN Write I/O0 into Semaphore Flag
L
X
X
L
X
L
______
______
Not Allowed
L
X
X
X
L
L
______
______
Not Allowed
NOTE:
1. There are eight semaphore flags written to via I/O0 and read from all I/O's (I/O0-I/O15). These eight semaphores are addressed by A0 - A2.
2939 tbl 05
Absolute Maximum Ratings(1)
Symbol
Rating
Commercial
& Industrial
Military
Unit
VTERM(2)
Terminal Voltage with Respect to GND
-0.5 to +7.0
-0.5 to +7.0
V
TBIAS
Temperature Under Bias
-55 to +125
-65 to +135
oC
TSTG
Storage Temperature
-55 to +125
-65 to +150
oC
IOUT
DC Output Current
50
50
mA
2939 tbl 06a
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and
functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure
to absolute maximum rating conditions for extended periods may affect reliability.
2. VTERM must not exceed Vcc + 10% for more than 25% of the cycle time or 10ns maximum, and is limited to < 20mA for the period of
VTERM > Vcc + 10%.
6.442
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