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HEF4050BT 데이터 시트보기 (PDF) - NXP Semiconductors.

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HEF4050BT
NXP
NXP Semiconductors. NXP
HEF4050BT Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
NXP Semiconductors
HEF4050B
Hex non-inverting buffers
Table 2.
Symbol
1A to 6A
VSS
n.c.
Pin description …continued
Pin
3, 5, 7, 9, 11, 14,
8
13, 16
7. Functional description
Description
input
ground supply voltage
not connected
Table 3. Guaranteed fan-out
Driven element
Standard TTL
74 LS
74 L
8. Limiting values
Guaranteed fan-out
2
9
16
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
VDD
VI
II/O
Tstg
Tamb
Ptot
supply voltage
input voltage
input/output current
storage temperature
ambient temperature
total power dissipation
Tamb 40 °C to +85 °C
DIP16 package
SO16 package
P
power dissipation
per output
Min
0.5
0.5
-
65
40
[1] -
[2] -
-
[1] For DIP16 package: Ptot derates linearly with 12 mW/K above 70 °C.
[2] For SO16 package: Ptot derates linearly with 8 mW/K above 70 °C.
9. Recommended operating conditions
Max
+18
VDD + 0.5
10
+150
+85
750
500
100
Table 5.
Symbol
VDD
VI
Tamb
t/V
Recommended operating conditions
Parameter
Conditions
supply voltage
input voltage
ambient temperature
in free air
input transition rise and fall rate
VDD = 5 V
VDD = 10 V
VDD = 15 V
Min
Max
3
15
0
VDD
40
+85
-
3.75
-
0.5
-
0.08
Unit
V
V
mA
°C
°C
mW
mW
mW
Unit
V
V
°C
ns/V
ns/V
ns/V
HEF4050B_5
Product data sheet
Rev. 05 — 11 November 2008
© NXP B.V. 2008. All rights reserved.
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