SST89E52RC 데이터 시트보기 (PDF) - Silicon Storage Technology

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SST89E52RC

FlashFlex MCU

Silicon Storage Technology 

FlashFlex MCU

SST89E52RC / SST89E54RC

FFFFH

EA# = 0

Secondary

Partition

3FFFH

EA# = 1

1KByte Page

4KByte Page

Data Sheet

External

64 KByte

4KByte Page

4KByte Page

Secondary

Partition

1FFFH

EA# = 1

1KByte Page

2KByte Page

2KByte Page

FIGURE

2KByte Page

4KByte Page

0000H

0000H

2KByte Page

0000H

SST89E54RC

SST89E52RC

1259 F02.3

3-2: Program Memory Organization and Code Security Protection

3.4 Dual Data Pointers

The device has two 16-bit data pointers. The DPTR Select

(DPS) bit in AUXR1 determines which of the two data

pointers is accessed. When DPS=0, DPTR0 is selected;

when DPS=1, DPTR1 is selected. Quickly switching

between the two data pointers can be accomplished by a

single INC instruction on AUXR1. (See Figure 3-3)

3.5 Special Function Registers

Most of the unique features of the FlashFlex microcontroller

family are controlled by bits in special function registers

(SFRs) located in the SFR memory map shown in Table 3-

2. Individual descriptions of each SFR are provided and

reset values indicated in Tables 3-3 to 3-8.

AUXR1 / bit0

DPS

DPS = 0 → DPTR0

DPS = 1 → DPTR1

DPH

83H

DPTR1

DPTR0

DPL

82H

FIGURE 3-3: Dual Data Pointer Organization

©2007 Silicon Storage Technology, Inc.

11

External Data Memory

S71259-04-000

1/07

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