PCK2014A 데이터 시트보기 (PDF) - Philips Electronics
부품명
상세내역
일치하는 목록
PCK2014A Datasheet PDF : 16 Pages
| |||
Philips Semiconductors
CK98 (100/133 MHz) spread spectrum
system clock generator
Product specification
PCK2014A
AC CHARACTERISTICS
VDD3V = 3.3 V ± 5%; VDDAPIC = VDD25V = 2.5 V ± 5%; fcrystal = 14.31818 MHz
CPU CLOCK OUTPUTS, CPU(0–5) (LUMP CAPACITANCE TEST LOAD = 20 pF)
SYMBOL
PARAMETER
LIMITS
Tamb = 0 to +70 °C
133 MHz MODE
LIMITS
Tamb = 0 to +70 °C
100 MHz MODE
MIN
MAX
MIN
MAX
THKP(avg)
THKP(abs_,om)
THKH
THKL
THRISE
THFALL
TJITTER
DUTY CYCLE
Average CPUCLK period
Absolute minimum CPUCLK period
CPUCLK HIGH time
CPUCLK LOW time
CPUCLK rise time
CPUCLK fall time
CPUCLK cycle-cycle jitter
Output Duty Cycle
7.5
7.35
1.87
1.67
0.4
0.4
45
7.65
n/a
n/a
n/a
1.6
1.6
150
55
10.0
9.85
3.0
2.8
0.4
0.4
45
10.3
n/a
n/a
n/a
1.6
1.6
150
55
THSKW
CPUCLK pin-pin skew
175
175
PCI CLOCK OUTPUTS, PCI(0–5) (LUMP CAPACITANCE TEST LOAD = 30 pF)
SYMBOL
PARAMETER
LIMITS
Tamb = 0 to +70 °C
133 MHz MODE
LIMITS
Tamb = 0 to +70 °C
100 MHz MODE
MIN
MAX
MIN
MAX
THKP
THKH
THKL
THRISE
THFALL
TJITTER
DUTY CYCLE
PCI period
PCI HIGH time
PCI LOW time
PCI rise time
PCI fall time
PCI cycle-cycle jitter
PCI Duty Cycle
30.0
n/a
30.0
n/a
12.0
n/a
12.0
n/a
12.0
n/a
12.0
n/a
0.5
2.0
0.5
2.0
0.5
2.0
0.5
2.0
300
300
45
55
45
55
THSKW
PCI pin-pin skew
500
500
APIC(0–1) CLOCK OUTPUT (LUMP CAPACITANCE TEST LOAD = 20 pF)
SYMBOL
PARAMETER
LIMITS
Tamb = 0 to +70 °C
133 MHz MODE
LIMITS
Tamb = 0 to +70 °C
100 MHz MODE
MIN
MAX
MIN
MAX
THKP
THKH
THKL
THRISE
THFALL
TJITTER
DUTY CYCLE
APIC CLK period
APIC CLK HIGH time
APIC CLK LOW time
APIC CLK rise time
APIC CLK fall time
APIC CLK cycle-cycle jitter
APIC CLK Duty Cycle
60.0
61.2
60.0
61.2
25.5
n/a
25.5
n/a
25.3
n/a
25.3
n/a
0.4
1.6
0.4
1.6
0.4
1.6
0.4
1.6
500
500
45
55
45
55
THSKW
APIC CLK pin-pin skew
250
250
UNIT
NOTES
ns
2, 9
ps
ns
5, 10
ns
6, 10
ns
8
ns
8
ps
%
1
ps
2
UNIT
NOTES
ns
2, 9
ns
5, 10
ns
6, 10
ns
8
ns
8
ps
%
1
ps
2
UNIT
NOTES
ns
2, 9
ns
5, 10
ns
6, 10
ns
8
ns
8
ps
%
1
ps
2
2001 Apr 02
8
Share Link: 