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NCP1336

Quasi-Resonant Current Mode Controller for High Power Universal Off-Line Supplies

ON Semiconductor 

NCP1336A/B

APPLICATION INFORMATION

NCP1336 implements a standard current−mode

architecture operating in quasi−resonant mode. Thanks to a

novel circuitry, the controller prevents valley−jumping

instability and steadily locks out in selected valley as the

power demand goes down. Once the fourth valley is reached,

the controller continues to reduce the frequency further

down, offering excellent efficiency over a wide operating

range. Thanks to a fault timer combined to an OPP circuitry,

the controller is able to efficiently limit the output power at

high−line.

• Quasi−Resonance Current−mode operation:

implementing quasi−resonance operation in peak

current−mode control, the NCP1336 optimizes the

efficiency by switching in the valley of the MOSFET

drain−source voltage. Thanks to a novel circuitry, the

controller locks−out in a selected valley and remains

locked until the output loading significantly changes.

This behavior is obtained by monitoring the feedback

voltage. When the load becomes lighter, the feedback

setpoint changes and the controller jumps into the next

valley. It can go down to the 4th valley if necessary.

Beyond this point, the controller reduces its switching

frequency by freezing the peak current setpoint. During

quasi−resonance operation, in case of very damped

valleys, a 5 ms timer adds the missing valleys.

• Frequency reduction in light−load conditions: when

the 4th valley is left, the controller reduces the

switching frequency which naturally improves the

standby power by a reduction of all switching losses.

• Overpower protection (OPP): a negative voltage

applied on OPP pin is directly added to the internal

peak current setpoint. If this voltage is created from an

auxiliary winding with flyback polarity, a direct image

of the input voltage is subtracted from the internal

clamp, thus reducing the peak current at high line. If the

OPP pin is connected to ground no compensation is

performed.

• Internal high−voltage startup switch: reaching a low

no−load standby power represents a difficult exercise

when the controller requires an external, lossy, resistor

connected to the bulk capacitor. Thanks to an internal

logic, the controller disables the high−voltage current

source after startup which no longer hampers the

consumption in no−load situations.

• Internal soft−start: a soft−start precludes the main

power switch from being stressed upon start−up. Its

duration is fixed and equal to 5 ms.

• OTP input: thanks to an internal current source, the

controller allows the direct connection of an NTC to

ground. As soon as the pin is brought below VOTP by

the NTC, the circuit permanently latches−off. During

soft−start, the OTP comparator is masked to allow the

voltage on pin OTP to rise above VOTP.

• OVP input: thanks to an internal bias resistor to

ground, the controller allows the direct connection of a

zener diode (or a resistor divider for improved

accuracy) to a monitored voltage. As soon as the pin is

brought above VOVP, the controller latches−off.

• Short−circuit protection: short−circuit and especially

over−load protections are difficult to implement when a

strong leakage inductance between auxiliary and power

windings affects the transformer (where the auxiliary

winding level does not properly collapse in presence of

an output short). Here, when the internal 0.8 V

maximum peak current limit is activated, the timer

capacitor is charged. If the fault disappears, the timer

capacitor is discharged by a current equal to the

charging current. If the timer reaches completion while

the error flag is still present, the controller stops the

pulses and goes into a latch−off phase, operating in a

low−frequency burst−mode via a triple hiccup

operation. To limit the fault output power, a

divide−by−three circuitry is installed on the VCC pin

and requires 3 times a start−up sequence before

attempting to restart on version B. As soon as the fault

disappears, the SMPS resumes operation. The latch−off

phase can also be initiated, more classically, when VCC

drops below VCCmin. On version A, the fault is latched.

• Brownout: the NCP1336 includes a brownout circuit

which safely stops the controller in case the input

voltage is too low. Restart occurs via a complete startup

sequence (latch reset and soft−start).

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