CDP6402 데이터 시트보기 (PDF) - Harris Semiconductor

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CDP6402

CMOS Universal Asynchronous Receiver/Transmitter (UART)

Harris Semiconductor 

CDP6402, CDP6402C

TABLE 2. FUNCTION PIN DEFINITION (Continued)

PIN

SYMBOL

DESCRIPTION

25

TRO

Character data, start data and stop bits appear serially at the TRANSMITTER REGISTER OUTPUT.

26

TBR1 Character data is loaded into the TRANSMITTER BUFFER REGISTER via inputs TBR1-TBR8. For character

formats less than 8 bits, the TBR8, 7, and 6 Inputs are ignored corresponding to the programmed word length.

27

TBR2

28

TBR3

29

TBR4

30

TBR5

See Pin 26 - TBR1

31

TBR6

32

TBR7

33

TBR8

34

CRL

A high level on CONTROL REGISTER LOAD loads the control register.

35

PI†

A high level on PARITY INHIBIT inhibits parity generation, parity checking and forces PE output low.

36

SBS† A high level on STOP BIT SELECT selects 1.5 stop bits for a 5 character format and 2 stop bits for other

lengths.

37

CLS2† These inputs program the CHARACTER LENGTH SELECTED. (CLS1 low CLS2 low 5 bits) (CLS1 high CLS2

low 6 bits) (CLS1 low CLS2 high 7 bits) (CLS1 high CLS2 high 8 bits).

38

CLSl† See Pin 37 - CLS2

39

EPE† When PI is low, a high level on EVEN PARITY ENABLE generates and checks even parity. A low level selects

odd parity.

40

TRC

The TRANSMITTER REGISTER CLOCK is 16X the transmit data rate.

† See Table 1 (Control Word Function)

5-81

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