CDP6402 데이터 시트보기 (PDF) - Harris Semiconductor
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CDP6402 Datasheet PDF : 12 Pages
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CDP6402, CDP6402C
Dynamic Electrical Specifications at TA = -40oC to +85oC, VDD ±5%, tR, tF = 20ns, VIH = 0.7 VDD, VIL = 0.3 VDD, CL = 100pF
LIMITS
CDP6402
CDP6402C
(NOTE 1)
PARAMETER
VDD
(NOTE 2) (NOTE 3) (NOTE 2) (NOTE 3)
(V)
TYP
MAX
TYP
MAX
UNITS
TRANSMITTER TIMING (See Figure 7)
Minimum Clock Period (TRC)
tCC
5
250
310
250
310
ns
10
125
155
-
-
ns
Minimum Pulse Width
Clock Low Level
tCL
5
100
125
100
125
ns
10
75
100
-
-
ns
Clock High Level
tCH
5
100
125
100
125
ns
10
75
100
-
-
ns
TBRL
tTHTH
5
10
80
200
80
200
ns
40
100
-
-
ns
Minimum Setup Time
TBRL to Clock
tTHC
5
175
275
175
275
ns
10
90
150
-
-
ns
Data to TBRL
tDT
5
20
50
20
50
ns
10
0
40
-
-
ns
Minimum Hold-Time
Data after TBRL
tTD
5
40
60
40
60
ns
10
20
30
-
-
ns
Propagation Delay Time
Clock to Data Start Bit
tCD
5
300
450
300
450
ns
10
150
225
-
-
ns
Clock to TBRE
tCT
5
330
400
330
400
ns
10
100
150
-
-
ns
TBRL to TBRE
tTTHR
5
200
300
200
300
ns
10
100
150
-
-
ns
Clock to TRE
tTTS
5
330
400
330
400
ns
10
100
150
-
-
ns
NOTES:
1. All measurements are made at the 50% point of the transition except three-state measurements.
2. Typical values for TA = 25oC and nominal VDD.
3. Maximum limits of minimum characteristics are the values above which all devices function.
5-83
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