AD5764(RevPrC) 데이터 시트보기 (PDF) - Analog Devices

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AD5764
(Rev.:RevPrC)

Complete, Quad, 16-Bit, High Accuracy, Serial Input, Bipolar Voltage Output DAC

Analog Devices 

AD5764

Preliminary Technical Data

Table 6. Input Register Format

MSB

LSB

R/W 0 REG2 REG1 REG0 A2 A1 A0 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

Table 7. Input Register Bit Functions

R/W

REG2, REG1, REG0

A2, A1, A0

D15 – D0

Indicates a read from or a write to the addressed register.

Used in association with the address bits to determine if a read or write operation is to the data register, offset

register, gain register, or function register.

REG2 REG1 REG0

Function

0

0

0

Function Register

0

1

0

Data Register

0

1

1

Coarse Gain Register

1

0

0

Fine Gain Register

1

0

1

Offset Register

These bits are used to decode the DAC channels

A2

A1

A0

Channel Address

0

0

0

DAC A

0

0

1

DAC B

0

1

0

DAC C

0

1

1

DAC D

1

0

0

ALL DACs

Data Bits

FUNCTION REGISTER

The Function Register is addressed by setting the three REG bits to 000. The values written to the address bits and the data bits determine

the function addressed. The Functions available through the function register are shown in Table 8 and Table 9.

Table 8. Function Register Options

REG2 REG1 REG0 A2 A1 A0

0

0

0

00 0

0

0

0

00 1

0

0

0

10 0

0

0

0

10 1

D15 …. D6

Don’t Care

D5

Local-

Ground-

Offset Adjust

D4

D3

D2

NOP, Data = Don’t Care

D1

Direction

D1 Value D0

Direction

CLR, Data = Don’t Care

LOAD, Data = Don’t Care

D1

D0

D0

SDO

Value Disable

Table 9. Explanation of Function Register Options

NOP

Local-Ground-

Offset Adjust

D0 / D1

Direction

D0 / D1 Value

SDO Disable

CLR

LOAD

No operation instruction used in readback operations.

Set by the user to enable local-ground-offset adjust function.

Cleared by the user to disable local-ground-offset adjust function (default).

Set by the user to enable D0/D1 as outputs.

Cleared by the user to enable D0/D1 as inputs (default). Have weak internal pull-ups.

I/O port status bits. Logic values written to these locations determine the logic outputs on the D0 and D1 pins when

configured as outputs. These bits indicate the status of the D0 and D1 pins when the I/O port is active as an input. When

enabled as inputs, these bits are don’t cares during a write operation.

Set by the user to disable the SDO output.

Cleared by the user to enable the SDO output (default).

Addressing this function resets the DAC outputs to 0 V in twos complement mode and negative full scale in binary

mode.

Addressing this function updates the DAC registers and consequently the analog outputs.

Rev. PrC 21-Oct-04| Page 20 of 28

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