MAX9316A 데이터 시트보기 (PDF) - Maxim Integrated
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MAX9316A Datasheet PDF : 11 Pages
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1:5 Differential (LV)PECL/(LV)ECL/
HSTL Clock and Data Driver
SCLK
Q_
Q_
tPLHD3
tPHLD3
VOH - VOL
VIHD
VILD
VOH
VOL
20%
Q_ - Q_
Figure 3. MAX9316A Timing Diagram for SCLK
80%
0V (DIFFERENTIAL)
tR
80%
0V (DIFFERENTIAL)
20%
tF
EN
CLK
SCLK OR CLK
Q_
Q_
tS
tH
OUTPUTS ARE LOW
tS
tPLHD
Figure 4. MAX9316A EN Timing Diagram
OUTPUTS STAY LOW
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