SST38VF166-70-4C-EK 데이터 시트보기 (PDF) - Silicon Storage Technology

부품명

상세내역

일치하는 목록

SST38VF166-70-4C-EK

16 Megabit FlashBank Memory

Silicon Storage Technology 

During any Sector-, Block-, or Bank-Erase within a bank,

any other bank may be read. During the Word-Write of the

E2 bank, either Flash bank may be read.

Flash Bank Bank-Erase

The SST38VF166 provides a Flash Bank-Erase mode,

which allows the user to clear the Flash bank to the “1”

state. This is useful when the entire Flash must be quickly

erased.

The software Flash Bank-Erase mode is initiated by issuing

the specific six-word loading sequence, as in the Software

Data Protection operation. After the loading cycle, the

device enters into an internally timed cycle. See Table 6 for

specific codes, Figure 13 or 16 for the timing waveform,

and Figure 44 for a flowchart.

Flash Bank Block-Erase

The SST38VF166 provides a Block-Erase mode, which

allows the user to clear any block in the Flash bank to the

“1” state.

The software Block-Erase mode is initiated by issuing the

specific six-word loading sequence, as in the Software

Data Protect operation. After the loading cycle, the device

enters into an internally timed Erase cycle. See Table 6 for

specific codes, Figure 14 or 17 for the timing waveform,

and Figure 45 for a flowchart. During the Erase operation,

the only valid reads are Data# Polling and Toggle Bit from

the selected bank, other banks may perform normal read.

Flash Bank Sector-Erase

The SST38VF166 provides a Sector-Erase mode, which

allows the user to clear any sector in the Flash bank to the

“1” state.

The software Sector-Erase mode is initiated by issuing the

specific six-word loading sequence, as in the Software

Data Protect operation. After the loading cycle, the device

enters into an internally timed Erase cycle. See Table 6 for

specific codes, Figure 15 or 18 for the timing waveform,

and Figure 47 for a flowchart. During the Erase operation,

the only valid reads are Data# Polling and Toggle Bit from

the selected bank, other banks may perform normal read.

E2 Bank Bank-Erase

The SST38VF166 provides a E2 Bank-Erase mode, which

allows the user to clear the E2 bank to the “1” state. This is

useful when the entire E2 bank must be quickly erased.

The E2 bank Bank-Erase command is disabled if the E2

bank OTP option is enabled.

16 Megabit FlashBank Memory

SST38VF166

Data Sheet

The E2 Bank-Erase mode is initiated by issuing the specific

six-word loading sequence, as in the Software Data Pro-

tection operation. After the loading cycle, the device enters

into an internally timed cycle. See Table 7 for specific

codes, Figure 19 for the timing waveform, and Figure 44 for

a flowchart.

E2 Bank Sector-Erase

The SST38VF166 provides a Sector-Erase mode, which

allows the user to clear any sector in the E2 bank to the “1”

state. The software Sector-Erase mode is initiated by issu-

ing the specific six-word loading sequence, as in the Soft-

ware Data Protect operation. After the loading cycle, the

device enters into an internally timed. See Tables 6 and 7

for specific codes, Figure 20 for the timing waveform, and

Figure 46 for a flowchart. During the Erase operation, the

only valid reads are Data# Polling and Toggle Bit in the E2

bank or normal read from either of the Flash banks.

Write Operation Status Detection

The SST38VF166 provides two software means to detect

the completion of a E2 bank or a Flash bank Program

cycle, in order to optimize the system Write cycle time. The

software detection includes two status bits: Data# Polling

(DQ7) and Toggle Bit (DQ6). The End-of-Write Detection

mode is enabled after the rising edge of WE#, which ini-

tiates the internal Write, Erase, or Program cycle.

The actual completion of the nonvolatile write is asynchro-

nous with the system; therefore, either a Data# Polling or

Toggle Bit read may be simultaneous with the completion

of the Write cycle. If this occurs, the system will possibly get

an erroneous result, i.e. valid data may appear to conflict

with either DQ7 or DQ6. In order to prevent spurious device

rejection, if an erroneous result occurs, the software routine

should include a loop to read the accessed location an

additional two (2) times. If both reads are valid, then the

device has completed the Write cycle, otherwise the rejec-

tion is valid.

Additionally, a Write Status read may be executed to deter-

mine if any bank has an Erase, Program, or Write opera-

tion in progress. A Write Status read may be used when,

for any reason, the system may have lost track of the status

of a Write, Erase, or Program operation in any bank.

Although normally, a Word-Write, Word-Program, Sector-

Erase, or Block-Erase will be completed prior to recovery

from a system reset, if a Bank-Erase was initiated prior to

the reset, the system may need to verify the Bank-Erase is

no longer in progress. Note, a Bank-Erase will not be per-

formed on the bank containing the boot code, so there will

©2001 Silicon Storage Technology, Inc.

4

327-3 2/01

S71065

Share Link: