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SST34HF1621 데이터시트 - Silicon Storage Technology

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SST34HF1621

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32 Pages

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제조사
SST
Silicon Storage Technology SST

PRODUCT DESCRIPTION
The SST34HF1621/1641 ComboMemory devices integrate a 1M x16 CMOS flash memory bank with a 256K x8/128K x16 or 512K x8/ 256K x16 CMOS SRAM memory bank in a Multi-Chip Package (MCP). These devices are fabricated using SST’s proprietary, high-performance CMOS SuperFlash technology incorporating the split-gate cell design and thick oxide tunneling injector to attain better reliability and manufacturability compared with alternate approaches. The SST34HF1621/1641 devices are ideal for applications such as cellular phones, GPSs, PDAs and other portable electronic devices in a low power and small form factor system.


FEATURES:
• Flash Organization: 1M x16
• Dual-Bank Architecture for Concurrent Read/Write Operation
    – 16 Mbit: 12 Mbit + 4 Mbit
• SRAM Organization:
    – 2 Mbit: 256K x8 or 128K x16
    – 4 Mbit: 512K x8 or 256K x16
• Single 2.7-3.3V Read and Write Operations
• Superior Reliability
    – Endurance: 100,000 Cycles (typical)
    – Greater than 100 years Data Retention
• Low Power Consumption:
    – Active Current: 25 mA (typical)
    – Standby Current: 20 µA (typical)
• Hardware Sector Protection (WP#)
    – Protects 4 outer most sectors (4 KWord) in the larger bank by holding WP# low and unprotects by holding WP# high
• Hardware Reset Pin (RST#)
    – Resets the internal state machine to reading data array
• Sector-Erase Capability
    – Uniform 1 KWord sectors
• Block-Erase Capability
    – Uniform 32 KWord blocks
• Read Access Time
    – Flash: 70 and 90 ns
    – SRAM: 70 and 90 ns
• Latched Address and Data
• Fast Erase and Word-Program:
    – Sector-Erase Time: 18 ms (typical)
    – Block-Erase Time: 18 ms (typical)
    – Chip-Erase Time: 70 ms (typical)
    – Word-Program Time: 14 µs (typical)
    – Chip Rewrite Time: 8 seconds (typical)
• Automatic Write Timing
    – Internal VPP Generation
• End-of-Write Detection
    – Toggle Bit
    – Data# Polling
    – Ready/Busy# pin
• CMOS I/O Compatibility
• JEDEC Standard Command Set
• Conforms to Common Flash Memory Interface (CFI)
• Packages Available
    – 56-ball LFBGA (8mm x 10mm)

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제조사
16 Mbit Concurrent SuperFlash + 2/4 Mbit SRAM ComboMemory
Silicon Storage Technology
16 Mbit Concurrent SuperFlash + 2/4/8 Mbit SRAM ComboMemory
Silicon Storage Technology
16 Mbit Concurrent SuperFlash + 8 Mbit SRAM ComboMemory
Silicon Storage Technology
16 Mbit Concurrent SuperFlash + 4/8 Mbit PSRAM ComboMemory
Silicon Storage Technology
16 Mbit Concurrent SuperFlash ( Rev : 2001 )
Silicon Storage Technology
16 Mbit (x8/x16) Concurrent SuperFlash
Silicon Storage Technology
16 Mbit (x8/x16) Concurrent SuperFlash
Silicon Storage Technology
2 Mbit Flash + 1 Mbit SRAM ComboMemory
Silicon Storage Technology
2 Mbit Flash + 1 Mbit SRAM ComboMemory ( Rev : 2001 )
Silicon Storage Technology
4 Mbit Flash + 1 Mbit or 256 Kbit SRAM ComboMemory
Silicon Storage Technology

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