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전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크
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MT9074AL 데이터시트 - Zarlink Semiconductor Inc

MT9074 image

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MT9074AL

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151 Pages

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1 MB

제조사
ZARLINK
Zarlink Semiconductor Inc ZARLINK

Description
The MT9074 is a single chip device, operable in either T1 or E1 mode, integrating either an advanced T1 (T1 mode) or PCM30 (E1 mode) framer with a Line Interface Unit (LIU).


FEATUREs
• Combined E1 (PCM30) and T1 (D4/ESF) framer, Line Interface Unit (LIU) and link controller with optional digital framer only mode
• In T1 mode the LIU can recover signals attenuated by up to 30 dB (5000 ft. of 24 AWG cable)
• In E1 mode the LIU can recover signals attenuated by up to 30 dB (1900 m. of 0.65 mm cable)
• Two HDLCs: FDL and channel 24 in T1 mode, timeslot 0 (Sa bits) and timeslot 16 in E1 mode
• Two-frame elastic buffer in Rx & Tx (T1) directions
• Programmable transmit delay through transmit slip buffer
• Low jitter DPLL for clock generation
• Enhanced alarms, performance monitoring and error insertion functions
• Intel or Motorola non-multiplexed parallel microprocessor interface
• ST-BUS 2.048 Mbit/s backplane bus for both data and signaling
• Japan Telecom J1 Framing and Yellow Alarm
• Hardware data link access
• JTAG Boundary Scan


APPLICATIONs
• E1/T1 add/drop multiplexers and channel banks
• CO and PBX equipment interfaces
• Primary Rate ISDN nodes
• Digital Cross-connect Systems (DCS)

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