Features
• Generates up to nine clock outputs, grouped as 4-4-1 from one reference clock input
• Pin enable/disable of two banks of four clocks
• Auto power-down shuts off PLL, brings outputs low in the absence of any REF input
• Tracking skew < 200ps (spread-spectrum tolerant)
• Input-to-output propagation delay < 200ps
• Available in a 16-pin 0.150” SOIC