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ADSP-21365(RevJ) 데이터시트 - Analog Devices

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ADSP-21365

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GENERAL DESCRIPTION
The ADSP-2136x SHARC® processor is a member of the SIMD SHARC family of DSPs that feature Analog Devices, Inc., Super Harvard Architecture. The processor is source code-compatible with the ADSP-2126x and ADSP-2116x DSPs, as well as with first generation ADSP-2106x SHARC processors in SISD (single-instruction, single-data) mode. The ADSP-2136x are 32-/40-bit floating-point processors optimized for high performance automotive audio applications. They contain a large on-chip SRAM and ROM, multiple internal buses to eliminate I/O bottlenecks, and an innovative digital audio interface (DAI).

SUMMARY
   High performance 32-bit/40-bit floating point processor
      optimized for high performance audio processing
   Single-instruction, multiple-data (SIMD) computational
      architecture
   On-chip memory—3M bits of on-chip SRAM
   Code compatible with all other members of the SHARC family
   The ADSP-2136x processors are available with up to 333 MHz
      core instruction rate with unique audiocentric peripherals
      such as the digital applications interface, S/PDIF transceiver,
      DTCP (digital transmission content protection
      protocol), serial ports, precision clock generators, and
      more. For complete ordering information, see Ordering
      Guide on Page 56.

DEDICATED AUDIO COMPONENTS
   S/PDIF-compatible digital audio receiver/transmitter
   8 channels of asynchronous sample rate converters (SRC)
   16 PWM outputs configured as four groups of four outputs
   ROM-based security features include:
      JTAG access to memory permitted with a 64-bit key
      Protected memory regions that can be assigned to limit
         access under program control to sensitive code
   PLL has a wide variety of software and hardware
      multiplier/divider ratios
   Available in 136-ball CSP_BGA and 144-lead LQFP_EP
      packages

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