General description
The 74LV4053 is a triple single-pole double-throw (SPDT) analog switch, suitable for use as an analog or digital multiplexer/demultiplexer. It is a low-voltage Si-gate CMOS device and is pin and function compatible with the 74HC4053 and 74HCT4053. Each switch has a digital select input (Sn), two independent inputs/outputs (nY0 and nY1) and a common input/output (nZ). All three switches share an enable input (E). A HIGH onE causes all switches into the high-impedance OFF-state, independent of Sn.

FEATUREs
Optimized for low-voltage applications: 1.0 V to 3.6 V
Accepts TTL input levels between VCC= 2.7 V and VCC= 3.6 V
Low ON resistance:
  180Ω(typical) at VCC−VEE= 2.0 V
  100Ω(typical) at VCC−VEE= 3.0 V
  75Ω(typical) at VCC−VEE= 4.5 V
Logic level translation:
  To enable 3 V logic to communicate with±3 V analog signals
Typical ‘break before make’ built in
ESD protection:
  HBM JESD22-A114-C exceeds 2000 V
  MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from−40°Cto+85°C and from−40°C to +125°C