73M2910L 데이터 시트보기 (PDF) - TDK Corporation
부품명
상세내역
일치하는 목록
73M2910L Datasheet PDF : 35 Pages
| |||
73M2910L
Microcontroller
RX DATA REGISTER (RXD) SFR ADDRESS 0C6h
Byte Addressable
Read Only Register
Reset State XXh
BIT 7
RX
DAT7
BIT 6
RX
DAT6
BIT 5
RX
DAT5
BIT 4
RX
DAT4
BIT 3
RX
DAT3
BIT 2
RX
DAT2
BIT 1
RX
DAT1
BIT 0
RX
DAT0
BITS 7-0 Received Data Byte
Bit 7 through bit 0 is the received data byte (LSB is received first) with all inserted 0s removed. A data ready
interrupt will be generated when a new data byte is received. Reading this register will clear the data ready
interrupt.
TX DATA REGISTER (TXD) SFR ADDRESS 0C7h
Byte Addressable
Write Only Register
Reset State XXh
BIT 7
TX
DAT7
BIT 6
TX
DAT6
BIT 5
TX
DAT5
BIT 4
TX
DAT4
BIT 3
TX
DAT3
BIT 2
TX
DAT2
BIT 1
TX
DAT1
BIT 0
TX
DAT0
BITS 7-0 Transmit Data Byte
Bit 7 through bit 0 will be transmitted at the next byte boundary (LSB first) if the HDLC TX control send data
bit is set. The HDLC will insert all necessary 0s. A TX ready interrupt will be generated when a new data byte
can be loaded into the TX Data Register. Writing this register will clear the TX ready interrupt.
21
Share Link: 