AD7641BSTZRL 데이터 시트보기 (PDF) - Analog Devices
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AD7641BSTZRL Datasheet PDF : 14 Pages
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AD7631/AD7634
Preliminary Technical Data
TIMING SPECIFICATIONS
AVDD = DVDD = 5 V; OVDD = 2.7 V to 5.5 V; VCC = 15V; VEE = -15V; VREF = 5 V; all specifications TMIN to TMAX, unless otherwise noted.
Table 3.
Parameter
Symbol Min
Typ
Max
Unit
CONVERSION AND RESET
Convert Pulse Width
Time Between Conversions (Warp Mode/Normal Mode1)
AD7631
AD7634 (Warp Mode/Normal Mode/Impulse Mode)2
CNVST Low to BUSY High Delay
BUSY High All Modes (Except Master Serial Read After Convert)
AD7631
AD7634 (Warp Mode/Normal Mode/Impulse Mode)
Aperture Delay
End of Conversion to BUSY Low Delay
Conversion Time
AD7631
AD7634 (Warp Mode/Normal Mode/Impulse Mode)
Acquisition Time
AD7631
AD7634 (Warp Mode/Normal Mode/Impulse Mode)
RESET Pulse Width
PARALLEL INTERFACE MODES
CNVST Low to DATA Valid Delay
AD7631
AD7634 (Warp Mode/Normal Mode/Impulse Mode)
DATA Valid to BUSY Low Delay
Bus Access Request to DATA Valid
Bus Relinquish Time
MASTER SERIAL INTERFACE MODES3
CS Low to SYNC Valid Delay
CS Low to Internal SCLK Valid Delay
CS Low to SDOUT Delay
CNVST Low to SYNC Delay
AD7631
AD7634 (Warp Mode/Normal Mode/Impulse Mode)
SYNC Asserted to SCLK First Edge Delay
Internal SCLK Period4
Internal SCLK High4
Internal SCLK Low4
SDOUT Valid Setup Time4
SDOUT Valid Hold Time4
SCLK Last Edge to SYNC Delay4
CS High to SYNC HI-Z
CS High to Internal SCLK HI-Z
CS High to SDOUT HI-Z
t1
10
t2
4
1.49/1.75/2.22
t3
t4
t5
2
t6
10
t7
t8
250
250
t9
10
ns
ns
μs
μs
35
ns
TBD
μs
TBD
μs
ns
ns
TBD
μs
TBD
μs
ns
ns
ns
t10
t11
12
t12
t13
5
1.5
μs
1/1.25/1.5 μs
ns
45
ns
15
ns
t14
t15
t16
t17
t18
3
t19
25
t20
12
t21
7
t22
4
t23
2
t24
3
t25
t26
t27
10
ns
10
ns
10
ns
525
ns
25/275/525
ns
ns
40
ns
ns
ns
ns
ns
ns
10
ns
10
ns
10
ns
Rev. PrC | Page 6 of 14
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