CXD2500BQ 데이터 시트보기 (PDF) - Sony Semiconductor
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CXD2500BQ Datasheet PDF : 48 Pages
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CXD2500BQ
$DC Command
Command
D3
D2
CLV CTRL
DCLV
TB
PWM MD
D1
D0
TP
CLVS
Gain
See “$CX Command.”
Command bit
DCLV PWM MD=1
DCLV PWM MD=0
Description (See Timing Chart 1-6.)
Specification of PWM mode for digital CLV. Both MDS and MDP are used.
Specification of PWM mode for digital CLV. Ternary MDP values are output.
Command bit
TB=0
TB=1
TP=0
TP=1
Description
In CLVS or CLVH mode, bottom value is held at periods of RFCK/32.
In CLVS or CLVH mode, bottom value is held at periods of RFCK/16.
In CLVS mode, peak value is held at periods of RFCK/4.
In CLVS mode, peak value is held at periods of RFCK/2.
In CLVH mode, peak holding is made at 34 kHz.
$EX Command
Command
CLV mode
D3
CM3
D2
CM2
D1
CM1
D0
CM0
CM3
0
1
1
1
1
1
0
CM2
0
0
0
1
1
1
1
CM1
0
0
1
1
0
1
1
CM0
0
0
0
0
0
1
0
Mode
STOP
KICK
BRAKE
CLVS
CLVH
CLVP
CLVA
Explanation
See Timing Chart 1-7.
See Timing Chart 1-8.
See Timing Chart 1-9.
STOP: Spindle motor stop mode
KICK: Spindle motor forward run mode
BRAKE: Spindle motor reverse run mode
CLVS: Rough servo mode for use for pulling disc run into RF-PLL capture range when the RF-PLL circuit
lock has been disengaged
CLVP: PLL servo mode
CLVA: Automatic switching mode for CLVS and CLVS. This mode is used during normal play status.
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