CXD2500BQ 데이터 시트보기 (PDF) - Sony Semiconductor

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CXD2500BQ

CD Digital Signal Processor

Sony Semiconductor 

CXD2500BQ

(1) CLOK, DATA, XLAT, CNIN, SQCK, and EXCK pins

(VDD=AVDD=5.0 V±5 %, VSS=AVSS=0 V, Topr=–20 to +75 °C

Item

Symbol

Min.

Clock frequency

fCK

Clock pulse width

tWCK

750

Setup time

tSU

300

Hold time

tH

300

Delay time

tD

300

Latch pulse width

tWL

750

EXCK, CNIN, SQCK frequency

fT

EXCK, CNIN, SQCK pulse width

tWT

300

Typ.

Max.

0.65

1

Unit

MHz

ns

MHz

ns

CLOK

DATA

1/fCK

tWCK

tWCK

XLAT tSU tH

EXCK

CNIN

SQCK

SUBQ

SQCK

tWT

tWT

1/fT

tSU tH

tD

tWL

Description of Functions

§1 CPU Interface and Commands

• CPU interface

This interface is used to set various modes using DATA, CLOK, and XLAT.

The interface timing chart is shown below.

CLOK

750ns or more

DATA

XLAT

D1 D2 D3 D0 D1 D2 D3

Data

Address

750ns or more

Registers 4 to E

Valid

300ns max

• The command addresses of the CXD2500B and the data capable of being set are shown in Table 1-1.

• When XRST is set to 0, the CXD2500B is reset, causing its internal registers to be initialized to the values

listed in Table 1-2.

—10—

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