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TEA2164S 데이터 시트보기 (PDF) - STMicroelectronics

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TEA2164S
ST-Microelectronics
STMicroelectronics ST-Microelectronics
TEA2164S Datasheet PDF : 16 Pages
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II - GENERAL DESCRIPTION (continued)
Figure 5 : Master Slave Mode Waveforms
SLAVE
CIRCUIT
Synchronization
MASTER
CIRCUIT
Sync.
Pulses
PWM
Signal
Pulse
Input
TEA2164S
Base
Current
Figure 6 : Burst Mode Waveforms
Collector
θ
Current
Envelop
0
Soft Start
t
4V
P2
C1
Voltage
(Pin 10)
1V
10
9
0
t
Tb
TEA2164S
ton
3.3 - 1.6 (V9)
T Max.
Output
Voltage
C1
0
t
Tb
106 (C in Farad)
3.3
θ
0.13
Tb
II.3 - Power Supply Start-up
After the mains have been switched-on, the VCC
storage capacitor of the TEA2164S is charged
through a high value resistor connected to the
rectified high voltage.
When Vcc reaches VCC start threshold (9V typ), the
TEA2164 starts operating in burst mode. Since
available output power is low in burst mode the
output power consumption must remain low before
complete setting-up of output voltage.
In TV application it can be achieved by main-
taining the TV in stand-by mode during start-up
(Figure 7).
7/16

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