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TEA2164S 데이터 시트보기 (PDF) - STMicroelectronics

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TEA2164S
ST-Microelectronics
STMicroelectronics ST-Microelectronics
TEA2164S Datasheet PDF : 16 Pages
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TEA2164S
II - GENERAL DESCRIPTION
In a master slave architecture,the TEA2164SCon-
trol IC, located at the primary side of an off line
power supplyachievesthe slavefunction; whereas
the master circuit is located at the secondary side.
The link between both circuits is realizedby a small
pulse transformer (Figure 4).
In the operation of the master-slave architecture,
four majors cases must be considered :
- normal operating
- stand-by mode
- power supply start-up
- abnormal conditions : off load, short circuit, ...
II.1 - Normal Operating (master slave mode)
In this configuration,the master circuit generates a
pulse width modulatedsignal issued from the moni-
toring of the output voltage which needs the best
accuracy (in TV applications : the horizontal deflec-
tionstage supply voltage). Themaster circuit power
supply can be supplied by another output.
Figure 4 : System Description Waveforms
The PWM signal are sent towards the primary side
through small differentiating transformer. For the
TEA2164Spositive pulses are transistorswitching-
on commands ; and negative pulses are transistor
switching-off commands (Figure 5). In this configu-
ration, only by synchronizing the master oscillator,
the switching transistor may be synchronized with
an external signal.
II.2 - Stand-by Mode
In this configuration the master circuit no longer
sends PWM signals, the structure is not synchro-
nized ; and the TEA2164Soperates in burst mode.
The average power consumption at the secondary
side may be very low 1W P 6W (as it is
consumed in TV set during stand by).
By action on the maximum duty cycle control, a
primary loop maintains a semi-regulation of the
output voltages.Voltage on feed-backis applied on
Pin 9.
Burstperiodis externallyprogrammed bycapacitor C1.
VCC(START)
TEA2164S
VCC
Voltage
0
VCC(STOP)
Collector
Current
Envelop
0
tBURST
B
B
b
Output
Voltage
0
TEA5170
Output
Voltage
Envelop
0
1 µP Supply
Voltage
2 Standby
0
1
tDELAY
Start-up
b
2
t1
Standby
Normal Operation
t
t
b
b
t
t
t
t2
Standby
tBURST : burst period
tDELAY : time constant generated by µP
B : burst envelop (out of regulation)
b : burst envelop (with standby regulation)
t1, t2 : commands issued by µP
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