TEA2164S 데이터 시트보기 (PDF) - STMicroelectronics
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TEA2164S Datasheet PDF : 16 Pages
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TEA2164S
Figure 2 : Substrat Biasing
Vsubstrat = V-
V-
V+
IB > 0
12 13 15
IB > 0
TEA2164S 14
145
IB < 0
V-
IB < 0
or
Vsubstrat = 0
V+
IB > 0
12 13 15
IB > 0
TEA2164S 14
145
IB < 0
IB < 0
Capacitive
Coupling
ELECTRICAL OPERATING CHARACTERISTICS
Tamb = 25oC, VCC = 10V, VCC- = 0V, potentials referenced to ground (Pin 1)
(unless otherwise specified)
Symbol
Parameter
Min. Typ. Max. Unit
POWER SUPPLY
VCC (start)
VCC (stop)
∆VCC
Starting Voltage (VCC increasing)
Stopping Voltage (VCC decreasing)
Hysteresis (VCC start – VCC stop)
Vccmax
Iccstart
Overvoltage Lock-out
Starting Positive Supply Current
CURRENT LIMITATION AND PROTECTION (Pin 11)
8
9
9.6
V
5
6.2
7.4
V
2
2.8
3.5
V
14.8 15.5 16.2
V
0.5
0.8
1.5
mA
VCM1
VCM2
∆VCM
Pulse by Pulse Current Limitation Threshold (see Note)
TEA2164SL (Low range)
TEA2164SH (high range)
Current Monitoring 2nd Threshold
∆VCM = VCM2 – VCM1 (L or H)
-1 -0.925 -0.825 V
-0.875 -0.775 -0.700 V
1200 1350 1500 mV
300 500 700 mV
REPETITIVE OVERCURRENT PROTECTION
VCM3
VCM3 - VCM1
VC2
I3 disch
I3 ch.
Repetitive Overcurrent Threshold (Pin 11)
VCM3 - VCM1 (L or H)
Lock-out Voltage on Pin 3
Capacitor C2 Discharge Current (synchronized mode)
Capacitor C2 Charge Current
-1.1 -0.9 -0.7
V
-0.16 0.05 0.16
V
2.4
3
3.6
V
10
20
30
µA
50
80
110
µA
OSCILLATOR, MAX DUTY CYCLE, SYNCHRONIZATION
To
Ton(max)
Tsyn
TO
Oscillator Initial Accuracy (RT = 50kΩ, CT = 1nF)
Maximum Duty Cycle (Tsyn = 1.05 To)
Synchronization Window
19.3
21
22.7
µs
60
70
85
%
1.0
1.5
OUTPUT STAGE
I14/I2
IBON
Ic Copy Current Gain
Base Current Starting Pulse
VERY LOW FREQUENCY OSCILLATOR
1000
300
mA
Burst Duty Cycle
13
%
Note : For the best accuracy of VCM1 value the TEA2164S is marked as follows : TEA2164SL (low range) or TEA2164SH (high range).
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