74LV595 데이터 시트보기 (PDF) - NXP Semiconductors.
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74LV595 Datasheet PDF : 20 Pages
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NXP Semiconductors
74LV595
8-bit serial-in/serial-out or parallel-out shift register; 3-state
VI 90 %
tW
negative
pulse
VM
10 %
0V
tf
VI
positive
pulse
tr
90 %
VM
10 %
0V
tW
VI
G
VCC
VO
DUT
RT
VM
tr
tf
VM
VEXT
RL
CL
RL
001aae331
Test data is given in Table 9.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Fig 13. Load circuit for measuring switching times
Table 9. Test data
Supply voltage VCC
< 2.7 V
2.7 V to 3.6 V
Input
VI
VCC
2.7 V
tr, tf
≤ 2.5 ns
≤ 2.5 ns
Load
CL
50 pF
50 pF
RL
1 kΩ
1 kΩ
VEXT
tPLH, tPHL
open
open
tPLZ, tPZL
2VCC
2VCC
tPHZ, tPZH
GND
GND
74LV595_3
Product data sheet
Rev. 03 — 21 April 2009
© NXP B.V. 2009. All rights reserved.
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