Nexperia
74AHC594-Q100; 74AHCT594-Q100
8-bit shift register with output register
DS
SHCP
SHR
STCP
STR
STAGE 0
D
Q
FFSH0
CP
R
STAGES 1 TO 6
D
Q
STAGE 7
D
Q
FFSH7
CP
R
D
Q
FFST0
CP
R
D
Q
FFST7
CP
R
Q7S
Q0
Fig 4. Logic diagram
6. Pinning information
6.1 Pinning
Q1 Q2 Q3 Q4 Q5 Q6
Fig 5. Pin configuration SO16
$+&4
$+&74
4
4
4
4
4
4
4
*1'
9&&
4
'6
675
67&3
6+&3
6+5
46
DDD
Q7
mbc321
74AHC_AHCT594_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 4 July 2013
© Nexperia B.V. 2017. All rights reserved
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