ADP3808AJPZ 데이터 시트보기 (PDF) - ON Semiconductor

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ADP3808AJPZ

High Efficiency Switch Mode Li-Ion Battery Charger

ON Semiconductor 

PIN DESCRIPTION

Pin No.

Symbol

1

ISYS

2

LIMSET

3

LIMIT

4

EXTPWR

5

RT

6

REFIN

7

BATADJ

8

EN

9

COMP

10

AGND

11

BAT

12

CELLSEL

13

CSADJ

14

CSM

15

CSP

16

PGND

17

DRVL

18

DRVREG

19

BST

20

DRVH

21

SW

22

VCC

23

SYSM

24

SYSP

25

Paddle

ADP3808A

Description

Output for System Current Sense Amplifier.

System Current Limit Set Point Input.

System Current Limit Output. This is an open-drain pin and requires a pull-up resistor to a maximum

of 6.0 V.

External Adapter Sense Open-Drain Output. This pin pulls low when the ac adapter voltage is

present. A pullup resistor is required to a maximum of 6 V.

Frequency Setting Resistor Input. An external resistor connected between this pin and AGND sets

the oscillator frequency of the device.

Reference Input for BATADJ and CSADJ.

Battery Voltage Adjust Input. This pin uses an analog voltage referenced to REFIN to program

voltage from 4.0 V to 4.5 V per cell.

Charger Enable Input. Pulling this pin to AGND disables the DRVH and DRVL outputs and puts the

circuitry powered by VCC into a low power state. The system amplifier and EXTPWR are still active.

Output of Error Amplifiers and Compensation Point.

Analog Ground. Reference point for the battery sense and all analog functions.

Battery Sense Input.

Battery Cell Selection Input. Pulling this pin high selects 3-cell operation; pulling it low selects 4-cell

operation.

Charge Current Programming Input. This pin uses an analog voltage referenced to REFIN to program

the battery charge current. (VCSP − VCSM) = 96 mV x CSADJ/REFIN.

Negative Current Sense Input. This pin connects to the battery side of the battery current sense

resistor.

Positive Current Sense Input. This pin connects to the inductor side of the battery current sense

resistor.

Power Ground. This pin should closely connect to the source of the lower MOSFET.

Synchronous Rectifier Drive. Output drive for the lower MOSFET.

Driver Supply Output. A bypass capacitor should be connected from this pin to PGND to provide

filtering for the low−side supply.

Upper MOSFET Floating Bootstrap Supply. A capacitor connected between the BST and SW pins

holds this bootstrapped voltage for the high−side MOSFET as it is switched.

Main Switch Drive. Output drive for the upper MOSFET.

Switch Node Input. This pin is connected to the buck-switching node, close to the source of the upper

MOSFET, and is the floating return for the upper MOSFET drive signal.

Input Supply. This pin does not power the SYS amplifier section.

Negative System Current Sense Input. This pin connects to the battery side of the system current

sense resistor.

Positive System Current Sense Input. This pin connects to the adapter side of the system current

sense resistor. This pin also provides power to the system amplifier section.

This pin should be connected to AGND.

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