AS5SS256K36ADQ-8.5/IT 데이터 시트보기 (PDF) - Austin Semiconductor
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AS5SS256K36ADQ-8.5/IT Datasheet PDF : 16 Pages
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Austin Semiconductor, Inc.
SSRAM
AS5SS256K36 &
AS5SS256K36A
ABSOLUTE MAXIMUM RATINGS*
Storage Temperature (Plastics) ...........................-55°C to +150°C
Storage Temperature (Ceramics) .........................-55°C to +125°C
Short Circuit Output Current (per I/O)…............................100mA
Voltage on any Pin Relative to Vss........................-0.5V to +4.6 V
Max Junction Temperature**..............................................+150°C
VIN
(DQx)
.........................................................-0.5V
to
VQ
DD
+0.5V
VIN (inputs) ................................................... ....-0.5V to VDD +0.5V
*Stresses greater than those listed under "Absolute Maximum
Ratings" may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at
these or any other conditions above those indicated in the
operation section of this specification is not implied. Exposure
to absolute maximum rating conditions for extended periods
may affect reliability.
** Junction temperature depends upon package type, cycle
time, loading, ambient temperature and airflow, and humidity.
3.3V I/O DC ELECTRICAL CHARACTERISTICS AND OPERATING CONDITIONS
(-55oC to +125oC or -40oC to +85oC; VDD, VDDQ = +3.3V +0.3V/-0.165V unless otherwise noted)
PARAMETER
Input High (Logic 1) Voltage
Input Low (Logic 0) Voltage
Input Leakage Current
Output Leakage Current
Output High Voltage
Output Low Voltage
Supply Voltage
Isolated Output Buffer Supply
CONDITION
OV < VIN < Vcc
Output(s) disabled, OV < VOUT < Vcc
IOH = -4.0 mA
IOL = 8.0 mA
SYMBOL
VIH
VIL
ILI
ILO
VOH
VOL
VDD
VDDQ
MIN
2.2
-0.3
-2
-2
2.4
---
3.135
3.135
MAX
VCC +0.3
0.8
2
2
--
0.4
3.6
3.6
UNITS
V
V
μΑ
μΑ
V
V
V
V
NOTES
1, 2
1, 2
3
1, 4
1, 4
1
1, 5
THERMAL RESISTANCE
DESCRIPTION
CONDITIONS
SYM TYP UNITS NOTES
Thermal Resistance
(Junction to Ambient)
1-layer θJA 40 oC/W
6
Thermal Resistance
Test conditions follow standard test
(Junction to Top of Case, Top) methods and procedures for measuring
thermal impedance, per EIA/JESD51.
θJC
9 oC/W
6
Thermal Resistance
(Junction to Pins, Bottom)
θJB 17 oC/W
6
NOTES:
1. All voltages referenced to Vss (GND).
2. Overshoot: VIH < +4.6V for t<tKC/2 for I < 20mA
Undershoot:
V
IL
>
-0.7V
for
t<tKC/2
for
I
<
20mA
Power-up: V < +3.6V and V < 3.135V for t < 200ms
IH
DD
3. MODE and ZZ pins have internal pull-up resistors, and input leakage = +10μA
4. The load used for V , V testing is shown in Figure 2 for 3.3V I/O. AC load current is higher than the stated DC values.
OH OL
AC I/O curves are available upon request.
5. VDDQ should never exceed VDD. VDD and VDDQ can be connected together.
6. This parameter is sampled.
AS5SS256K36 &
AS5SS256K36A
Rev. 3.6 06/05
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
7
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