AS5SS256K36ADQ-8.5/IT 데이터 시트보기 (PDF) - Austin Semiconductor
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AS5SS256K36ADQ-8.5/IT Datasheet PDF : 16 Pages
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Austin Semiconductor, Inc.
SSRAM
AS5SS256K36 &
AS5SS256K36A
256K x 36 SSRAM
Flow-Through, Synchronous
Burst SRAM
FEATURES
z Organized 256K x 36
z Fast Clock and OE\ access times
z Single +3.3V +0.3V/-0.165V power supply (VDD)
z SNOOZE MODE for reduced-power standby
z Common data inputs and data outputs
z Individual BYTE WRITE control and GLOBAL WRITE
z Three chip enables for simple depth expansion and address
pipelining
z Clock-controlled and registered addresses, data I/Os and
control signals
z Internally self-timed WRITE cycle
z Burst control (interleaved or linear burst)
z Automatic power-down for portable applications
z 100-lead TQFP package for high density, high speed
z Low capacitive bus loading
OPTIONS
z Timing
8.5ns/10ns/100MHz
10ns/15ns/66MHz
z Packages
100-pin TQFP (2-chip enable)
z Pinout
2-chip Enables
3-chip Enables
z Operating Temperature Ranges
Military (-55oC to +125oC)
Industrial (-40oC to +85oC)
MARKING
-8.5*
-10
DQ No. 1001
A (PRELIMINARY)
no indicator
XT*
IT
*NOTE: -8.5/XT combination not available.
GENERAL DESCRIPTION
The AS5SS256K36 employs high-speed, low-power CMOS
designs that are fabricated using an advanced CMOS process.
This 8Mb Synchronous Burst SRAM integrates a 256K x 36
SRAM core with advanced synchronous peripheral circuitry and a 2-bit
burst counter. All synchronous inputs pass through registers controlled
by a positive-edge-triggered single-clock input (CLK). The synchro-
nous inputs include all addresses, all data inputs, active LOW chip en-
able (CE\), two additional chip enables for easy depth expansion (CE2\,
CE2), burst control inputs (ADSC\, ADSP\, ADV\), byte write enables
(BWx\) and global write (GW\). Note that CE2\ is not available on the
A version.
For more products and information
please visit our web site at
www.austinsemiconductor.com
AS5SS256K36 &
AS5SS256K36A
Rev. 3.6 06/05
1
PIN ASSIGNMENT
(Top View)
100-pin TQFP (DQ)
(2-chip enable version, “A” indicator)
DQPc 1
DQc 2
DQc 3
VDDQ 4
Vss 5
DQc 6
DQc 7
DQc 8
DQc 9
Vss 1 0
VDDQ 1 1
DQc 1 2
DQc 1 3
Vss 1 4
VDD 1 5
NC 16
Vss 1 7
DQd 1 8
DQd 1 9
VDDQ 2 0
Vss 2 1
DQd 2 2
DQd 2 3
DQd 2 4
DQd 2 5
Vss 2 6
VDDQ 2 7
DQd 2 8
DQd 2 9
DQPd 3 0
8 0 DQPb
7 9 DQb
7 8 DQb
7 7 VDDQ
7 6 Vss
7 5 DQb
7 4 DQb
7 3 DQb
7 2 DQb
7 1 Vss
7 0 VDDQ
6 9 DQb
6 8 DQb
6 7 Vss
66 NC
6 5 VDD
6 4 ZZ
6 3 DQa
6 2 DQa
6 1 VDDQ
6 0 Vss
5 9 DQa
5 8 DQa
5 7 DQa
5 6 DQa
5 5 Vss
5 4 VDDQ
5 3 DQa
5 2 DQa
5 1 DQPa
100-pin TQFP (DQ)
(3-chip enable version, no indicator)
DQPc 1
DQc 2
DQc 3
VDDQ 4
Vss 5
DQc 6
DQc 7
DQc 8
DQc 9
Vss 1 0
VDDQ 1 1
DQc 1 2
DQc 1 3
Vss 1 4
VDD 1 5
NC 16
Vss 1 7
DQd 1 8
DQd 1 9
VDDQ 2 0
Vss 2 1
DQd 2 2
DQd 2 3
DQd 2 4
DQd 2 5
Vss 2 6
VDDQ 2 7
DQd 2 8
DQd 2 9
DQPd 3 0
8 0 DQPb
7 9 DQb
7 8 DQb
7 7 VDDQ
7 6 Vss
7 5 DQb
7 4 DQb
7 3 DQb
7 2 DQb
7 1 Vss
7 0 VDDQ
6 9 DQb
6 8 DQb
6 7 Vss
66 NC
6 5 VDD
6 4 ZZ
6 3 DQa
6 2 DQa
6 1 VDDQ
6 0 Vss
5 9 DQa
5 8 DQa
5 7 DQa
5 6 DQa
5 5 Vss
5 4 VDDQ
5 3 DQa
5 2 DQa
5 1 DQPa
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
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