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전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크

AD7866(Rev0) 데이터 시트보기 (PDF) - Analog Devices

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AD7866 Datasheet PDF : 20 Pages
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AD7866–SPECIFICATIONS1 (TA = TMIN to TMAX, VDD = 2.7 V to 5.25 V, VDRIVE = 2.7 V to 5.25 V, Reference = 2.5 V
External on DCAPA and DCAPB, fSCLK = 20 MHz, unless otherwise noted.)
Parameter
A Version1 B Version1 Unit
Test Conditions/Comments
DYNAMIC PERFORMANCE
Signal to Noise + Distortion (SINAD)2 68
68
Total Harmonic Distortion (THD)2
–75
–75
Peak Harmonic or Spurious Noise (SFDR)2 –76
–76
Intermodulation Distortion (IMD)2
Second Order Terms
–88
–88
Third Order Terms
–88
–88
Channel to Channel Isolation
–88
–88
dB min
dB max
dB max
dB typ
dB typ
dB typ
fIN = 300 kHz Sine Wave, fS = 1 MSPS
fIN = 300 kHz Sine Wave, fS = 1 MSPS
fIN = 300 kHz Sine Wave, fS = 1 MSPS
SAMPLE AND HOLD
Aperture Delay3
Aperture Jitter3
Aperture Delay Matching3
Full Power Bandwidth
10
10
50
50
200
200
12
12
2
2
ns max
ps typ
ps max
MHz typ
MHz typ
@ 3 dB
@ 0.1 dB
DC ACCURACY
Resolution
Integral Nonlinearity
Differential Nonlinearity
0 V to VREF Input Range
Offset Error
Offset Error Match
Gain Error
Gain Error Match
2 × VREF Input Range
Positive Gain Error
Zero Code Error
Zero Code Error Match
Negative Gain Error
12
± 1.5
–0.95/+1.25
12
±1
± 1.5
–0.95/+1.25
Bits
LSB max
LSB max
LSB max
±8
±8
± 1.2
± 1.2
± 2.5
± 2.5
± 0.2
± 0.2
LSB max
LSB typ
LSB max
LSB typ
± 2.5
± 2.5
±8
±8
± 0.2
± 0.2
± 2.5
± 2.5
LSB max
LSB max
LSB typ
LSB max
B Grade, 0 V to VREF range only; ±0.5 LSB typ
0 V to 2 × VREF range; ± 0.5 LSB typ
Guaranteed No Missed Codes to 12 Bits
Straight Binary Output Coding
–VREF to +VREF Biased about VREF with
Two’s Complement Output Coding
ANALOG INPUT
Input Voltage Ranges
DC Leakage Current
Input Capacitance
0 to VREF
0 to VREF
0 to 2 × VREF 0 to 2 × VREF
± 500
± 500
30
30
10
10
V
V
nA max
pF typ
pF typ
RANGE Pin Low upon CS Falling Edge
RANGE Pin High upon CS Falling Edge
When in Track
When in Hold
REFERENCE INPUT/OUTPUT
Reference Input Voltage
Reference Input Voltage Range4
DC Leakage Current
Input Capacitance
Reference Output Voltage5
VREF Output Impedance6
Reference Temperature Coefficient
REF OUT Error (TMIN to TMAX)
LOGIC INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IIN
Input Capacitance, CIN3
LOGIC OUTPUTS
Output High Voltage, VOH
Output Low Voltage, VOL
Floating-State Leakage Current
Floating-State Output Capacitance3
Output Coding
2.5
2/3
± 30
± 160
20
2.45/2.55
25
45
50
± 15
2.5
2/3
± 30
± 160
20
2.45/2.55
25
45
50
± 15
V
V min/V max
µA max
µA max
pF typ
V min/V max
typ
typ
ppm/°C typ
mV typ
± 1% for Specified Performance
REF SELECT Pin Tied High
VREF Pin;
DCAPA, DCAPB Pins;
VDD = 5 V
VDD = 3 V
0.7 VDRIVE
0.3 VDRIVE
±1
10
0.7 VDRIVE
0.3 VDRIVE
±1
10
V min
V max
µA max
pF max
Typically 15 nA, VIN = 0 V or VDRIVE
VDRIVE – 0.2 VDRIVE – 0.2
0.4
0.4
±1
±1
10
10
Straight (Natural) Binary
Two’s Complement
V min
V max
µA max
pF max
ISOURCE = 200 µA
ISINK = 200 µA
VDD = 2.7 V to 5.25 V
Selectable with Either Input Range
–2–
REV. 0

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